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liuk7071 2023-08-07 21:05:21 +02:00
parent 56b802976d
commit 6c8bde7389
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src/cpu/backends/interpreter/interpreter.cpp
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@ -4,7 +4,6 @@
void Interpreter::step(CpuCore* core, Memory* mem, Disassembler* disassembler) {
// Handle interrupts
core->checkInterrupt(mem->interrupt);
// core->pc -= 4;
CpuCore::Instruction instr = { .raw = mem->read<u32>(core->pc) };