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[DMA] Fix UB

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This commit is contained in:
liuk7071 2023-07-28 01:35:38 +02:00
parent e03bc1503d
commit b27277cc89
3 changed files with 16 additions and 20 deletions
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14
src/dma/dma.cpp
View file

@ -3,30 +3,28 @@
DMA::DMA() {
//channels[6].doDMA = &otcDMA;
channels[6].doDMA = &otcDMA;
}
bool DMA::DMAChannel::shouldStartDMA() {
return chcr.enable && ((chcr.syncMode == 0) ? chcr.trigger.Value() : true);
}
/*void DMA::doDMA(int channel, Memory* memory) {
printf("%d", channel);
void DMA::doDMA(int channel, Memory* memory) {
// If the dma func of the channel is null, it means it hasn't been implemented yet
if (!channels[channel].doDMA)
Helpers::panic("[DMA] Unimplemented DMA channel %d\n", channel);
channels[channel].doDMA(memory);
}*/
}
/*void DMA::otcDMA(Memory* memory) {
printf("panda...");
void DMA::otcDMA(Memory* memory) {
auto& dma = memory->dma;
constexpr auto ch = 6;
// OTC DMA is always sync mode 0 and backwards memory address step
switch (dma->channels[ch].chcr.syncMode) {
default:
Helpers::panic("[DMA] Unimplemented OTC DMA sync mode %d\n", dma->channels[ch].chcr.syncMode);
Helpers::panic("[DMA] Unimplemented OTC DMA sync mode %d\n", dma->channels[ch].chcr.syncMode.Value());
}
}*/
}

10
src/dma/dma.hpp
View file

@ -12,16 +12,16 @@ public:
DMA();
struct DMAChannel {
u32 madr;
u32 madr = 0;
union {
u32 raw;
u32 raw = 0;
BitField<0, 16, u32> bs;
BitField<0, 16, u32> ba;
} bcr;
union {
u32 raw;
u32 raw = 0;
BitField<0, 1, u32> dir;
BitField<1, 1, u32> step;
BitField<8, 1, u32> chopping;
@ -47,6 +47,6 @@ public:
LinkedList
};
/*void doDMA(int channel, Memory* memory);
static void otcDMA(Memory* memory);*/
void doDMA(int channel, Memory* memory);
static void otcDMA(Memory* memory);
};

12
src/memory/memory.cpp
View file

@ -110,7 +110,7 @@ u32 Memory::read(u32 vaddr) {
// DMA
else if (Helpers::inRange<u32>(paddr, 0x1f801080, 0x1f8010e8)) {
const auto channel = ((paddr >> 4) & 0xf) - 8;
Helpers::assert(channel < 8, "Tried to access %dth DMA channel", channel); // Should not get triggered
Helpers::assert(channel < 7, "Tried to access %dth DMA channel", channel); // Should not get triggered
switch (paddr & 0xf) {
case 0x0: return dma->channels[channel].madr;
@ -187,19 +187,17 @@ void Memory::write(u32 vaddr, u32 data) {
else if (paddr == 0x1f801070) interrupt->writeIstat(data);
else if (paddr == 0x1f801074) interrupt->writeImask(data);
// DMA
else if (Helpers::inRange<u32>(paddr, 0x1f801080, 0x1f8010e8)) {
printf("panda\n");
else if (Helpers::inRange<u32>(paddr, 0x1f801080, 0x1f8010e8)) {
const auto channel = ((paddr >> 4) & 0xf) - 8;
Helpers::assert(channel < 8, "Tried to access %dth DMA channel", channel); // Should not get triggered
// TODO: /Ob2 doesnt work
Helpers::assert(channel < 7, "Tried to access %dth DMA channel", channel); // Should not get triggered
switch (paddr & 0xf) {
case 0x0: dma->channels[channel].madr = data; break;
case 0x4: dma->channels[channel].bcr.raw = data; break;
case 0x8: {
dma->channels[channel].chcr.raw = data;
if (dma->channels[channel].shouldStartDMA()) {
Helpers::panic("AAAAAAAAAAAA\n");
//dma->doDMA(channel, this);
dma->doDMA(channel, this);
}
break;
}