Commit graph

234 commits

Author SHA1 Message Date
liuk707 c0a3c53cdc
Create linux_build.yml 2023-07-25 16:37:30 +02:00
liuk7071 983f23d5d4 Fix linux build 2023-07-25 17:57:23 +02:00
liuk7071 04b8d4eb34 Better .gitignore 2023-07-24 16:44:13 +02:00
liuk7071 405ca405a1 [Interrupt] Rename INTC to Interrupt and move interrupt files to the cpu folder 2023-07-24 16:43:17 +02:00
liuk7071 82a054f4e9 [DMA] DMA channel writes 2023-07-24 16:35:52 +02:00
liuk7071 03eb3e9767 [CPU] Make the switchBackend function actually switch backends 2023-07-24 15:48:06 +02:00
liuk7071 41afe0964e [DMA] Add DMAChannel struct 2023-07-24 00:40:42 +02:00
liuk7071 429e41eea6 [CPU] :rsob: 2023-07-24 00:12:59 +02:00
liuk7071 891a0d75a5 [CPU] nextPc instead of pc + 4 in branches 2023-07-23 22:44:18 +02:00
liuk7071 8353601087 [CPU] Increment nextPc after fetching instead of after executing 2023-07-17 18:03:35 +02:00
liuk7071 a053808b9b [CPU] Add old interpreter backend 2023-07-17 17:32:47 +02:00
liuk7071 5dafc7d736 [CPU] Fix exceptions 2023-07-17 16:32:21 +02:00
liuk7071 0c3e2eb52e [GPU] Add command 0xE1 2023-07-17 15:31:40 +02:00
liuk7071 67aba64b4e [DMA] Add DMA class 2023-07-17 00:59:51 +02:00
liuk7071 87439afa3e [CPU] Add SYSCALL, RFE 2023-07-17 00:33:37 +02:00
liuk7071 c0d1356bef [CPU] Exceptions 2023-07-17 00:15:46 +02:00
liuk7071 b553caa737 [CPU] Add MULT, MULTU 2023-07-16 19:59:50 +02:00
liuk7071 8047f93e80 [CPU] Add DIV, DIVU, MFLO, MTLO, MFHI, MTHI 2023-07-16 19:57:39 +02:00
liuk7071 46c4f5ac51 [CPU] Add REGIMM opcodes 2023-07-16 19:48:01 +02:00
liuk7071 854550c23d [CPU] Add LBU, LHU 2023-07-16 19:39:12 +02:00
liuk7071 a942db45e8 [CPU] Fix sign-extension bug in LB and LH 2023-07-16 19:38:14 +02:00
liuk7071 e489767be3 [INTC] INTC writes/reads 2023-07-16 19:37:14 +02:00
liuk7071 76e57f8ee4 [CPU] Move disassembler to its own class 2023-07-16 19:10:43 +02:00
liuk7071 7db8e65625 [CPU] Add MFC0 2023-07-16 19:00:08 +02:00
liuk7071 217403b520 [CPU] Add JR, JALR 2023-07-16 18:57:05 +02:00
liuk7071 9c8a13f87d [CPU] Fix branches/jumps 2023-07-16 18:29:50 +02:00
liuk7071 696e1307d1 [CPU] Add more instructions to disassembler 2023-07-16 18:26:35 +02:00
liuk7071 51db6bbf87 [CPU] Add ADD, ADDU, SUB, SUBU 2023-07-16 18:00:15 +02:00
liuk7071 af874efbaf [CPU] Add SLT, SLTU, SLTI, SLTIU 2023-07-16 17:56:47 +02:00
liuk7071 6d126eed21 [CPU] Handle more COP0 register writes 2023-07-16 17:54:01 +02:00
liuk7071 8e56b4dc84 LB, LH, LW 2023-07-16 17:45:25 +02:00
liuk7071 84d21b0178 BEQ, BNE, BLEZ, BGTZ 2023-07-16 17:42:11 +02:00
liuk7071 48817ad3d0 COP0 2023-07-16 17:37:11 +02:00
liuk7071 658c051e9e J 2023-07-16 16:43:58 +02:00
liuk7071 488773ad79 ADDI, ADDIU 2023-07-16 16:41:06 +02:00
liuk7071 ed0dee827d SB, SH, SW, other stuff 2023-07-16 16:23:55 +02:00
liuk7071 43b97aa7b9 Fix ORI disassembler 2023-07-16 01:51:19 +02:00
liuk7071 2a4fbf3ab5 Add ORI to disassembler 2023-07-16 01:46:54 +02:00
liuk7071 9683b2defb SLLV, SRLV, SRAV 2023-07-16 01:45:33 +02:00
liuk7071 a4e56ea921 SLL, SRL, SRA 2023-07-16 01:42:56 +02:00
liuk7071 0179f4d2ee ANDI, ORI, XORI 2023-07-16 01:36:43 +02:00
liuk7071 d199b50bfc First instruction (LUI) 2023-07-16 01:21:28 +02:00
liuk7071 ac63b917a3 First real commit 2023-07-15 22:21:43 +02:00
liuk7071 218946bca5 Update README.md 2023-07-15 17:04:55 +02:00
liuk7071 c11eaa29f4 Add README.md 2023-07-15 16:54:18 +02:00
liuk7071 cb0348433c Remove files 2023-07-15 16:29:51 +02:00
liuk7071 75731c2812 push changes 2023-07-15 16:19:55 +02:00
liuk7071 6e8b4cc06f pitch counter 2023-03-31 15:36:38 +02:00
liuk7071 23faf7bd85 many things, begin spu 2023-03-31 13:52:19 +02:00
liuk707 ad47cc9a88
Update README.md 2022-12-11 14:18:36 +01:00