mirror of
https://github.com/google0101-ryan/Emotional.git
synced 2024-05-22 22:18:17 -04:00
333 lines
7.9 KiB
C++
333 lines
7.9 KiB
C++
#pragma once
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#include <stdint.h>
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class EETLB
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{
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public:
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uintptr_t* rdTable;
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uintptr_t* wrTable;
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struct TlbEntry
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{
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union Entry
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{
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__uint128_t data;
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struct
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{
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__uint128_t v0 : 1,
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d0 : 1,
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c0 : 3,
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pfn0 : 20,
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v1 : 1,
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d1 : 1,
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c1 : 3,
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pfn1 : 20,
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s : 1,
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asid : 8,
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g : 1,
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vpn2 : 19,
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mask : 12;
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};
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} entry;
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uint32_t pageSize;
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uint32_t pageShift;
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} tlb[48];
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public:
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EETLB();
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void Unmap(TlbEntry& entry);
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void DoRemap(int index);
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};
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namespace EEInterpreter
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{
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inline const char* Reg(int index)
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{
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switch (index)
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{
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case 0:
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return "$zero";
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case 1:
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return "$at";
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case 2:
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return "$v0";
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case 3:
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return "$v1";
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case 4:
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return "$a0";
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case 5:
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return "$a1";
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case 6:
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return "$a2";
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case 7:
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return "$a3";
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case 8:
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return "$t0";
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case 9:
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return "$t1";
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case 10:
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return "$t2";
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case 11:
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return "$t3";
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case 12:
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return "$t4";
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case 13:
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return "$t5";
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case 14:
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return "$t6";
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case 15:
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return "$t7";
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case 16:
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return "$s0";
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case 17:
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return "$s1";
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case 18:
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return "$s2";
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case 19:
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return "$s3";
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case 20:
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return "$s4";
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case 21:
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return "$s5";
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case 22:
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return "$s6";
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case 23:
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return "$s7";
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case 24:
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return "$t8";
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case 25:
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return "$t9";
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case 26:
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return "$k0";
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case 27:
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return "$k1";
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case 28:
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return "$gp";
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case 29:
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return "$sp";
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case 30:
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return "$fp";
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case 31:
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return "$ra";
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default:
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return "";
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}
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}
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union COP0Status
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{
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uint32_t value;
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struct
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{
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uint32_t ie : 1; /* Interrupt Enable */
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uint32_t exl : 1; /* Exception Level */
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uint32_t erl : 1; /* Error Level */
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uint32_t ksu : 2; /* Kernel/Supervisor/User Mode bits */
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uint32_t : 5;
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uint32_t im0 : 1; /* Int[1:0] signals */
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uint32_t im1 : 1;
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uint32_t bem : 1; /* Bus Error Mask */
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uint32_t : 2;
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uint32_t im7 : 1; /* Internal timer interrupt */
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uint32_t eie : 1; /* Enable IE */
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uint32_t edi : 1; /* EI/DI instruction Enable */
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uint32_t ch : 1; /* Cache Hit */
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uint32_t : 3;
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uint32_t bev : 1; /* Location of TLB refill */
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uint32_t dev : 1; /* Location of Performance counter */
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uint32_t : 2;
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uint32_t fr : 1; /* Additional floating point registers */
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uint32_t : 1;
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uint32_t cu : 4; /* Usability of each of the four coprocessors */
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};
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};
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union COP0Cause
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{
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uint32_t value;
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struct
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{
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uint32_t : 2;
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uint32_t exccode : 5;
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uint32_t : 3;
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uint32_t ip0_pending : 1;
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uint32_t ip1_pending : 1;
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uint32_t siop : 1;
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uint32_t : 2;
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uint32_t timer_ip_pending : 1;
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uint32_t exc2 : 3;
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uint32_t : 9;
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uint32_t ce : 2;
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uint32_t bd2 : 1;
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uint32_t bd : 1;
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};
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};
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enum OperatingMode
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{
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USER_MODE = 0b10,
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SUPERVISOR_MODE = 0b01,
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KERNEL_MODE = 0b00
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};
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/* The COP0 registers */
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union COP0
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{
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uint32_t regs[32] = {};
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struct
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{
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uint32_t index;
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uint32_t random;
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uint32_t entry_lo0;
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uint32_t entry_lo1;
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uint32_t context;
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uint32_t page_mask;
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uint32_t wired;
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uint32_t reserved0[1];
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uint32_t bad_vaddr;
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uint32_t count;
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uint32_t entryhi;
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uint32_t compare;
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COP0Status status;
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COP0Cause cause;
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uint32_t epc;
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uint32_t prid;
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uint32_t config;
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uint32_t reserved1[6];
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uint32_t bad_paddr;
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uint32_t debug;
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uint32_t perf;
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uint32_t reserved2[2];
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uint32_t tag_lo;
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uint32_t tag_hi;
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uint32_t error_epc;
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uint32_t reserved3[1];
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};
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};
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extern COP0 cop0;
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static constexpr bool CanDisassamble = false;
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extern EETLB* tlb;
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union Cop1Reg
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{
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float f;
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uint32_t u;
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int32_t s;
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};
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uint8_t Read8(uint32_t addr);
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uint16_t Read16(uint32_t addr);
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uint32_t Read32(uint32_t addr);
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uint64_t Read64(uint32_t addr);
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__uint128_t Read128(uint32_t addr);
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void Write8(uint32_t addr, uint8_t data);
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void Write16(uint32_t addr, uint16_t data);
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void Write32(uint32_t addr, uint32_t data);
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void Write64(uint32_t addr, uint64_t data);
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void Write128(uint32_t addr, __uint128_t data);
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void Reset();
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void Clock(int cycles);
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void Dump();
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// Normal
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void J(uint32_t instr); // 0x02
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void Jal(uint32_t instr); // 0x03
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void Beq(uint32_t instr); // 0x04
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void Bne(uint32_t instr); // 0x05
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void Blez(uint32_t instr); // 0x06
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void Bgtz(uint32_t instr); // 0x07
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void Addiu(uint32_t instr); // 0x09
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void Slti(uint32_t instr); // 0x0A
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void Sltiu(uint32_t instr); // 0x0B
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void Andi(uint32_t instr); // 0x0C
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void Ori(uint32_t instr); // 0x0D
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void Xori(uint32_t instr); // 0x0E
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void Lui(uint32_t instr); // 0x0F
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void Beql(uint32_t instr); // 0x14
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void Bnel(uint32_t instr); // 0x15
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void Daddiu(uint32_t instr); // 0x19
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void Lq(uint32_t instr); // 0x1e
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void Sq(uint32_t instr); // 0x1f
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void Lb(uint32_t instr); // 0x20
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void Lh(uint32_t instr); // 0x21
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void Lw(uint32_t instr); // 0x23
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void Lbu(uint32_t instr); // 0x24
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void Lhu(uint32_t instr); // 0x25
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void Lwu(uint32_t instr); // 0x27
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void Sb(uint32_t instr); // 0x28
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void Sh(uint32_t instr); // 0x29
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void Sw(uint32_t instr); // 0x2B
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void Swc1(uint32_t instr); // 0x31
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void Ld(uint32_t instr); // 0x37
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void Sd(uint32_t instr); // 0x3F
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// Special
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void Sll(uint32_t instr); // 0x00
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void Srl(uint32_t instr); // 0x02
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void Sra(uint32_t instr); // 0x03
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void Sllv(uint32_t instr); // 0x04
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void Srav(uint32_t instr); // 0x07
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void Jr(uint32_t instr); // 0x08
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void Jalr(uint32_t instr); // 0x09
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void Movz(uint32_t instr); // 0x0a
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void Movn(uint32_t instr); // 0x0b
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void Mfhi(uint32_t instr); // 0x10
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void Mflo(uint32_t instr); // 0x12
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void Dsllv(uint32_t instr); // 0x14
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void Dsrav(uint32_t instr); // 0x17
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void Mult(uint32_t instr); // 0x18
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void Multu(uint32_t instr); // 0x19
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void Div(uint32_t instr); // 0x1A
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void Divu(uint32_t instr); // 0x1B
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void Addu(uint32_t instr); // 0x21
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void Subu(uint32_t instr); // 0x23
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void And(uint32_t instr); // 0x24
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void Or(uint32_t instr); // 0x25
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void Nor(uint32_t instr); // 0x27
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void Slt(uint32_t instr); // 0x2a
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void Sltu(uint32_t instr); // 0x2b
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void Daddu(uint32_t instr); // 0x2d
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void Dsll(uint32_t instr); // 0x38
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void Dsll32(uint32_t instr); // 0x3c
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void Dsra32(uint32_t instr); // 0x3f
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// Regimm
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void Bltz(uint32_t instr); // 0x00
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void Bgez(uint32_t instr); // 0x01
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// Cop0
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void Mfc0(uint32_t instr); // 0x00
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void Mtc0(uint32_t instr); // 0x04
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// Cop0 TLB
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void Tlbwi(uint32_t instr); // 0x02
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// MMI
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void Mflo1(uint32_t instr); // 0x12
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void Mult1(uint32_t instr); // 0x18
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void Divu1(uint32_t instr); // 0x1B
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// MMI3
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void Por(uint32_t instr);
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// COP2
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void Qmfc2(uint32_t instr); // 0x01
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void Cfc2(uint32_t instr); // 0x02
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void Qmtc2(uint32_t instr); // 0x05
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void Ctc2(uint32_t instr); // 0x06
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// COP1
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void Mtc1(uint32_t instr); // 0x04
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// COP1.S
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void Addas(uint32_t instr); // 0x18
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} |