mirror of
https://github.com/JetSetIlly/Gopher2600.git
synced 2024-05-20 05:40:49 -04:00
9f6cbdad58
updated QUANTUM and STEP commands to accoodate new quantum control window changed to support the three quantum options improved/corrected the conditions under which the ONSTEP command is run disassembly.ExecutedEntry() updates existing entry
102 lines
3.3 KiB
Go
102 lines
3.3 KiB
Go
// This file is part of Gopher2600.
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//
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// Gopher2600 is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Gopher2600 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Gopher2600. If not, see <https://www.gnu.org/licenses/>.
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package hardware
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func nullCallback(_ bool) error {
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return nil
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}
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// Step the emulator state one CPU instruction
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func (vcs *VCS) Step(colorClockCallback func(isCycle bool) error) error {
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if colorClockCallback == nil {
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colorClockCallback = nullCallback
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}
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// the cycle function defines the order of operation for the rest of
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// the VCS for every CPU cycle. the function block represents the ϕ0 cycle
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//
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// the cpu calls the cycle function after every CPU cycle. this is a
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// bit backwards compared to the operation of a real VCS but I believe the
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// effect is the same:
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//
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// in the real machine, the pulse from the OSC color clock drives the TIA.
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// a pulse from this clock moves the state of the TIA forward one color
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// clock. each of the OSC pulses is fed through a div/3 circuit (ϕ0) the
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// output of which is attached to pin 26 of the TIA and to pin 20 of the
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// CPU. each pulse of ϕ0 drives the CPU forward one CPU cycle.
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//
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// in this emulation meanwhile, the CPU-TIA is reversed. each call to
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// Step() drives the CPU. After each CPU cycle the CPU emulation yields to
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// the cycle() function defined below.
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//
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// the reason for this inside-out arrangement is simply a consequence of
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// the how the CPU emulation is put together. it is easier for the large
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// CPU ExecuteInstruction() function to call out to the cycle()
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// function. if we were to do it the other way around then keeping track of
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// the interim CPU state becomes trickier.
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//
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// we could solve this by using go-channels but early experiments suggested
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// that this was too slow. a better solution would be to build the CPU
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// instructions out of smaller micro-instructions. this should make jumping
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// in and out of the CPU far easier.
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//
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// I don't believe any visual or audible artefacts of the VCS (undocumented
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// or not) rely on the details of the CPU-TIA relationship.
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//
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// at the end of the cycle() function the cycleCallback() function is called
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cycle := func() error {
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if err := vcs.Input.Handle(); err != nil {
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return err
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}
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vcs.TIA.QuickStep(1)
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if err := colorClockCallback(false); err != nil {
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return err
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}
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vcs.TIA.QuickStep(2)
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if err := colorClockCallback(false); err != nil {
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return err
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}
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if reg, ok := vcs.Mem.TIA.ChipHasChanged(); ok {
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vcs.TIA.Step(reg, 3)
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} else {
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vcs.TIA.QuickStep(3)
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}
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if reg, ok := vcs.Mem.RIOT.ChipHasChanged(); ok {
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vcs.RIOT.Step(reg)
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} else {
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vcs.RIOT.QuickStep()
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}
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vcs.Mem.Cart.Step(vcs.Clock)
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if err := colorClockCallback(true); err != nil {
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return err
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}
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return nil
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}
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err := vcs.CPU.ExecuteInstruction(cycle)
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if err != nil {
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return err
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}
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return nil
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}
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