mirror of
https://github.com/JetSetIlly/Gopher2600.git
synced 2024-05-20 05:40:49 -04:00
4c530bf7a7
- 6502 implementation is basically correct but does not handle
- interrupts
- pre-fetch cycle
- anything less fine grained than instruction stepping
- memory sub-system sketched in
o retroactive adding of GPL copyright notice
451 lines
11 KiB
Go
451 lines
11 KiB
Go
package cpu_test
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import (
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"fmt"
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"headless/hardware/cpu"
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"testing"
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)
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func step(t *testing.T, mc *cpu.CPU) *cpu.StepResult {
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sr, err := mc.Step()
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if err != nil {
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t.Errorf("error during CPU step (%v)\n", err)
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return nil
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}
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err = sr.IsValid()
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if err != nil {
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t.Errorf("error during CPU step (%v)\n", err)
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return nil
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} else {
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fmt.Println(sr)
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}
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return sr
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}
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func testStatusInstructions(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// SEC; CLC; CLI; SEI; SED; CLD; CLV
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origin = mem.putInstructions(origin, 0x38, 0x18, 0x58, 0x78, 0xf8, 0xd8, 0xb8)
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step(t, mc) // SEC
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assert(t, mc.Status, "sv-BdIZC")
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step(t, mc) // CLC
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assert(t, mc.Status, "sv-BdIZc")
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step(t, mc) // CLI
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assert(t, mc.Status, "sv-BdiZc")
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step(t, mc) // SEI
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assert(t, mc.Status, "sv-BdIZc")
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step(t, mc) // SED
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assert(t, mc.Status, "sv-BDIZc")
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step(t, mc) // CLD
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assert(t, mc.Status, "sv-BdIZc")
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step(t, mc) // CLV
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assert(t, mc.Status, "sv-BdIZc")
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// PHP; PLP
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origin = mem.putInstructions(origin, 0x08, 0x28)
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step(t, mc) // PHP
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assert(t, mc.Status, "sv-BdIZc")
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assert(t, mc.SP, 254)
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// mangle status register
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mc.Status.Sign = true
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mc.Status.Overflow = true
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mc.Status.Break = false
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// restore status register
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step(t, mc) // PLP
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assert(t, mc.SP, 255)
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assert(t, mc.Status, "sv-BdIZc")
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}
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func testRegsiterArithmetic(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// LDA immediate; ADC immediate
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origin = mem.putInstructions(origin, 0xa9, 1, 0x69, 10)
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step(t, mc) // LDA #1
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step(t, mc) // ADC #1
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assert(t, mc.A, 11)
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// SEC; SBC immediate
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origin = mem.putInstructions(origin, 0x38, 0xe9, 8)
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step(t, mc) // SEC
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step(t, mc) // SBC #8
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assert(t, mc.A, 3)
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}
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func testRegsiterBitwiseInstructions(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// ORA immediate; EOR immediate; AND immediate
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origin = mem.putInstructions(origin, 0x09, 0xff, 0x49, 0xf0, 0x29, 0x01)
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assert(t, mc.A, 0)
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step(t, mc) // ORA #$FF
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assert(t, mc.A, 255)
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step(t, mc) // EOR #$F0
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assert(t, mc.A, 15)
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step(t, mc) // AND #$01
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assert(t, mc.A, 1)
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// ASL implied; LSR implied; LSR implied
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origin = mem.putInstructions(origin, 0x0a, 0x4a, 0x4a)
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step(t, mc) // ASL
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assert(t, mc.A, 2)
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assert(t, mc.Status, "sv-BdIzc")
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step(t, mc) // LSR
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assert(t, mc.A, 1)
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assert(t, mc.Status, "sv-BdIzc")
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step(t, mc) // LSR
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assert(t, mc.A, 0)
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assert(t, mc.Status, "sv-BdIZC")
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// ROL implied; ROR implied; ROR implied; ROR implied
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origin = mem.putInstructions(origin, 0x2a, 0x6a, 0x6a, 0x6a)
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step(t, mc) // ROL
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assert(t, mc.A, 1)
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assert(t, mc.Status, "sv-BdIzc")
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step(t, mc) // ROR
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assert(t, mc.A, 0)
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assert(t, mc.Status, "sv-BdIZC")
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step(t, mc) // ROR
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assert(t, mc.A, 128)
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assert(t, mc.Status, "Sv-BdIzc")
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step(t, mc) // ROR
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assert(t, mc.A, 64)
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assert(t, mc.Status, "sv-BdIzc")
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}
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func testImmediateImplied(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// LDX immediate; INX; DEX
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origin = mem.putInstructions(origin, 0xa2, 5, 0xe8, 0xca)
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step(t, mc) // LDX #5
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assert(t, mc.X, 5)
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step(t, mc) // INX
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assert(t, mc.X, 6)
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step(t, mc) // DEX
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assert(t, mc.X, 5)
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assert(t, mc.Status, "sv-BdIzc")
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// PHA; LDA immediate; PLA
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origin = mem.putInstructions(origin, 0xa9, 5, 0x48, 0xa9, 0, 0x68)
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step(t, mc) // LDA #5
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step(t, mc) // PHA
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assert(t, mc.SP, 254)
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step(t, mc) // LDA #0
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assert(t, mc.A, 0)
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assert(t, mc.Status.Zero, true)
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step(t, mc) // PLA
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assert(t, mc.A, 5)
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// TAX; TAY; LDX immediate; TXA; LDY immediate; TYA; INY; DEY
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origin = mem.putInstructions(origin, 0xaa, 0xa8, 0xa2, 1, 0x8a, 0xa0, 2, 0x98, 0xc8, 0x88)
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step(t, mc) // TAX
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assert(t, mc.X, 5)
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step(t, mc) // TAY
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assert(t, mc.Y, 5)
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step(t, mc) // LDX #1
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step(t, mc) // TXA
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assert(t, mc.A, 1)
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step(t, mc) // LDY #2
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step(t, mc) // TYA
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assert(t, mc.A, 2)
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step(t, mc) // INY
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assert(t, mc.Y, 3)
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step(t, mc) // DEY
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assert(t, mc.Y, 2)
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// TSX; LDX immediate; TXS
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origin = mem.putInstructions(origin, 0xba, 0xa2, 100, 0x9a)
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step(t, mc) // TSX
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assert(t, mc.X, 255)
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step(t, mc) // LDX #100
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step(t, mc) // TXS
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assert(t, mc.SP, 100)
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}
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func testOtherAddressingModes(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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mem.putInstructions(0x0100, 123, 43)
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mem.putInstructions(0x01a2, 47)
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// LDA zero page
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origin = mem.putInstructions(origin, 0xa5, 0x00)
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step(t, mc) // LDA $00
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assert(t, mc.A, 0xa5)
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// LDX immediate; LDA zero page,X
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origin = mem.putInstructions(origin, 0xa2, 1, 0xb5, 0x01)
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step(t, mc) // LDX #1
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step(t, mc) // LDA 01,X
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assert(t, mc.A, 0xa2)
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// LDY immediate; LDX zero page,Y
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origin = mem.putInstructions(origin, 0xa0, 3, 0xb6, 0x01)
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step(t, mc) // LDX #3
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step(t, mc) // LDA 01,Y
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assert(t, mc.A, 0xa2)
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// LDA absolute
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origin = mem.putInstructions(origin, 0xad, 0x00, 0x01)
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step(t, mc) // LDA $0100
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assert(t, mc.A, 123)
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// LDX immediate; LDA absolute,X
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origin = mem.putInstructions(origin, 0xa2, 1, 0xbd, 0x01, 0x00)
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step(t, mc) // LDX #1
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assert(t, mc.X, 1)
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step(t, mc) // LDA $0001,X
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assert(t, mc.A, 0xa2)
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// LDY immediate; LDA absolute,Y
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origin = mem.putInstructions(origin, 0xa0, 1, 0xb9, 0x01, 0x00)
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step(t, mc) // LDY #1
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assert(t, mc.X, 1)
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step(t, mc) // LDA $0001,Y
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assert(t, mc.A, 0xa2)
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// pre-indexed indirect
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// X = 1
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// INX; LDA (Indirect, X)
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origin = mem.putInstructions(origin, 0xe8, 0xa1, 0x0b)
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step(t, mc) // INX (x equals 2)
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step(t, mc) // LDA (0x0b,X)
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assert(t, mc.A, 47)
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// post-indexed indirect
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// Y = 1
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// LDA (Indirect), Y
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origin = mem.putInstructions(origin, 0xb1, 0x0b)
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step(t, mc) // LDA (0x0b),Y
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assert(t, mc.A, 43)
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// pre-indexed indirect (with wraparound)
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// X = 1
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// INX; LDA (Indirect, X)
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origin = mem.putInstructions(origin, 0xe8, 0xa1, 0xff)
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step(t, mc) // INX (x equals 2)
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step(t, mc) // LDA (0xff,X)
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assert(t, mc.A, 47)
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// post-indexed indirect (with page-fault)
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// Y = 1
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// INY; INY; LDA (Indirect), Y
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mem.putInstructions(0xc0, 0xfd, 0x00)
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origin = mem.putInstructions(origin, 0xc8, 0xc8, 0xb1, 0xc0)
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step(t, mc) // INY (y = 2)
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step(t, mc) // INY (y = 2)
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sr := step(t, mc) // LDA (0x0b),Y
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assert(t, mc.A, 123)
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assert(t, sr.PageFault, true)
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}
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func testStorageInstructions(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// LDA immediate; STA absolute
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origin = mem.putInstructions(origin, 0xa9, 0x54, 0x8d, 0x00, 0x01)
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step(t, mc) // LDA 0x54
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step(t, mc) // STA 0x0100
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mem.assert(t, 0x0100, 0x54)
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// LDX immediate; STX absolute
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origin = mem.putInstructions(origin, 0xa2, 0x63, 0x8e, 0x01, 0x01)
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step(t, mc) // LDX 0x63
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step(t, mc) // STX 0x0101
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mem.assert(t, 0x0101, 0x63)
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// LDY immediate; STY absolute
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origin = mem.putInstructions(origin, 0xa0, 0x72, 0x8c, 0x02, 0x01)
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step(t, mc) // LDY 0x72
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step(t, mc) // STY 0x0102
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mem.assert(t, 0x0101, 0x63)
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// INC zero page
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origin = mem.putInstructions(origin, 0xe6, 0x01)
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step(t, mc) // INC $01
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mem.assert(t, 0x01, 0x55)
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// DEC absolute
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origin = mem.putInstructions(origin, 0xce, 0x00, 0x01)
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step(t, mc) // DEC 0x0100
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mem.assert(t, 0x0100, 0x53)
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}
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func testBranching(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0x10, 0x10)
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step(t, mc) // BPL $10
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assert(t, mc.PC, 0x12)
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0x50, 0x10)
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step(t, mc) // BVC $10
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assert(t, mc.PC, 0x12)
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0x90, 0x10)
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step(t, mc) // BCC $10
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assert(t, mc.PC, 0x12)
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0x38, 0xb0, 0x10)
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step(t, mc) // SEC
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step(t, mc) // BCS $10
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assert(t, mc.PC, 0x13)
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0xe8, 0xd0, 0x10)
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step(t, mc) // INX
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step(t, mc) // BNE $10
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assert(t, mc.PC, 0x13)
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origin = mem.clear()
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mc.Reset()
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origin = mem.putInstructions(origin, 0xca, 0x30, 0x10)
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step(t, mc) // DEX
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step(t, mc) // BMI $10
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assert(t, mc.PC, 0x13)
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origin = mem.putInstructions(0x13, 0xe8, 0xf0, 0x10)
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step(t, mc) // INX
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step(t, mc) // BEQ $10
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assert(t, mc.PC, 0x26)
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origin = mem.clear()
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mc.Reset()
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// fudging overflow test
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mc.Status.Overflow = true
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origin = mem.putInstructions(origin, 0x70, 0x10)
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step(t, mc) // BVS $10
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assert(t, mc.PC, 0x12)
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}
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func testJumps(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// JMP absolute
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origin = mem.putInstructions(origin, 0x4c, 0x00, 0x01)
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step(t, mc) // JMP $100
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assert(t, mc.PC, 0x0100)
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// JMP indirect
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origin = mem.clear()
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mc.Reset()
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mem.putInstructions(0x0050, 0x49, 0x01)
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origin = mem.putInstructions(origin, 0x6c, 0x50, 0x00)
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step(t, mc) // JMP ($50)
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assert(t, mc.PC, 0x0149)
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// JMP indirect (bug)
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origin = mem.clear()
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mc.Reset()
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mem.putInstructions(0x01FF, 0x03)
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mem.putInstructions(0x0100, 0x00)
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origin = mem.putInstructions(origin, 0x6c, 0xFF, 0x01)
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step(t, mc) // JMP ($0x01FF)
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assert(t, mc.PC, 0x0003)
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}
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func testComparisonInstructions(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// CMP immediate (equality)
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origin = mem.putInstructions(origin, 0xc9, 0x00)
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step(t, mc) // CMP $00
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assert(t, mc.Status, "sv-BdIZc")
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// LDA immediate; CMP immediate
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origin = mem.putInstructions(origin, 0xa9, 0xf6, 0xc9, 0x18)
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step(t, mc) // LDA $F6
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step(t, mc) // CMP $10
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assert(t, mc.Status, "Sv-BdIzC")
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// LDX immediate; CMP immediate
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origin = mem.putInstructions(origin, 0xa2, 0xf6, 0xe0, 0x18)
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step(t, mc) // LDX $F6
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step(t, mc) // CMP $10
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assert(t, mc.Status, "Sv-BdIzC")
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// LDY immediate; CMP immediate
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origin = mem.putInstructions(origin, 0xa0, 0xf6, 0xc0, 0x18)
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step(t, mc) // LDY $F6
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step(t, mc) // CMP $10
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assert(t, mc.Status, "Sv-BdIzC")
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// LDA immediate; CMP immediate
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origin = mem.putInstructions(origin, 0xa9, 0x18, 0xc9, 0xf6)
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step(t, mc) // LDA $F6
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step(t, mc) // CMP $10
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assert(t, mc.Status, "sv-BdIzc")
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// BIT zero page
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origin = mem.putInstructions(origin, 0x24, 0x01)
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step(t, mc) // BIT $01
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assert(t, mc.Status, "sv-BdIZc")
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// BIT zero page
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origin = mem.putInstructions(origin, 0x24, 0x0e)
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step(t, mc) // BIT $01
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assert(t, mc.Status, "sv-BdIzc")
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}
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func testSubroutineInstructions(t *testing.T, mc *cpu.CPU, mem *MockMem) {
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origin := mem.clear()
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mc.Reset()
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// JSR absolute
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origin = mem.putInstructions(origin, 0x20, 0x00, 0x01)
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step(t, mc) // JSR $0100
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assert(t, mc.PC, 0x0100)
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mem.assert(t, 255, 0x00)
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mem.assert(t, 254, 0x02)
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assert(t, mc.SP, 253)
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origin = mem.putInstructions(0x100, 0x60)
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step(t, mc) // RTS
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assert(t, mc.PC, 0x0003)
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mem.assert(t, 255, 0x00)
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mem.assert(t, 254, 0x02)
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assert(t, mc.SP, 255)
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}
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func TestCPU(t *testing.T) {
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mem := NewMockMem()
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mc := cpu.NewCPU(mem)
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testStatusInstructions(t, mc, mem)
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testRegsiterArithmetic(t, mc, mem)
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testRegsiterBitwiseInstructions(t, mc, mem)
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testImmediateImplied(t, mc, mem)
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testOtherAddressingModes(t, mc, mem)
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testStorageInstructions(t, mc, mem)
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testBranching(t, mc, mem)
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testJumps(t, mc, mem)
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testComparisonInstructions(t, mc, mem)
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testSubroutineInstructions(t, mc, mem)
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}
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