mirror of
https://github.com/JetSetIlly/Gopher2600.git
synced 2024-06-01 11:37:58 -04:00
4c530bf7a7
- 6502 implementation is basically correct but does not handle
- interrupts
- pre-fetch cycle
- anything less fine grained than instruction stepping
- memory sub-system sketched in
o retroactive adding of GPL copyright notice
106 lines
2.8 KiB
Go
106 lines
2.8 KiB
Go
package cpu
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import (
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"fmt"
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"reflect"
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)
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// StepResult contains all the interesting information from a CPU step.
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type StepResult struct {
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ProgramCounter uint16
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Defn InstructionDefinition
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InstructionData interface{}
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ActualCycles int
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// whether an extra cycle was required because of 8 bit adder overflow
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PageFault bool
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// whether a buggy (CPU) code path was triggered
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Bug string
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}
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func (sr StepResult) String() string {
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var data string
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var pf, bug string
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if sr.Defn.Bytes == 2 {
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data = fmt.Sprintf("$%02x", sr.InstructionData)
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} else if sr.Defn.Bytes == 3 {
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data = fmt.Sprintf("$%04x", sr.InstructionData)
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}
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switch sr.Defn.AddressingMode {
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case Implied:
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case Immediate:
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data = fmt.Sprintf("#%s", data)
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case Relative:
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case Absolute:
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case ZeroPage:
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case Indirect:
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data = fmt.Sprintf("(%s)", data)
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case PreIndexedIndirect:
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data = fmt.Sprintf("(%s,X)", data)
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case PostIndexedIndirect:
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data = fmt.Sprintf("(%s),Y", data)
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case AbsoluteIndexedX:
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data = fmt.Sprintf("%s,X", data)
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case AbsoluteIndexedY:
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data = fmt.Sprintf("%s,Y", data)
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case IndexedZeroPageX:
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data = fmt.Sprintf("%s,X", data)
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case IndexedZeroPageY:
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data = fmt.Sprintf("%s,Y", data)
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default:
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}
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if sr.PageFault {
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pf = " page-fault"
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}
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if sr.Bug != "" {
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bug = fmt.Sprintf(" * %s *", sr.Bug)
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}
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return fmt.Sprintf("0x%04x\t%s\t%s\t[%d]%s%s", sr.ProgramCounter, sr.Defn.Mnemonic, data, sr.ActualCycles, pf, bug)
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}
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// IsValid checks whether the instance of StepResult contains consistent data.
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//
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// Intended to be used during development of the CPU pacakge, to make sure
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// implementation hasn't gone off the rails.
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func (sr StepResult) IsValid() error {
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// check that InstructionData is broadly sensible - is either nil, a uint16 or uint8
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if sr.InstructionData != nil {
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ot := reflect.TypeOf(sr.InstructionData).Kind()
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if ot != reflect.Uint16 && ot != reflect.Uint8 {
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return fmt.Errorf("instruction data is bad (%s)", ot)
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}
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}
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// is PageFault valid given content of Defn
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if !sr.Defn.PageSensitive && sr.PageFault {
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return fmt.Errorf("unexpected page fault")
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}
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// if a bug has been triggered, don't perform the number of cycles check
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if sr.Bug != "" {
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if sr.Defn.AddressingMode == Relative {
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if sr.ActualCycles != sr.Defn.Cycles && sr.ActualCycles != sr.Defn.Cycles+1 {
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return fmt.Errorf("number of cycles wrong (%d instead of %d or %d)", sr.ActualCycles, sr.Defn.Cycles, sr.Defn.Cycles+1)
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}
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} else {
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if sr.Defn.PageSensitive {
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if sr.PageFault && sr.ActualCycles != sr.Defn.Cycles && sr.ActualCycles != sr.Defn.Cycles+1 {
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return fmt.Errorf("number of cycles wrong (%d instead of %d or %d)", sr.ActualCycles, sr.Defn.Cycles, sr.Defn.Cycles+1)
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}
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} else {
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if sr.ActualCycles != sr.Defn.Cycles {
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return fmt.Errorf("number of cycles wrong (%d instead of %d", sr.ActualCycles, sr.Defn.Cycles)
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}
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}
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}
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}
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return nil
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}
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