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Merge pull request #134 from Perkka2/master

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Adding delayed writes to $4016 EPSM Addressing
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NovaSquirrel 2022-10-24 18:11:06 -04:00 committed by GitHub
parent a5008a7d1b ec1cdf5fe3
commit a6c9741c1f
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GPG key ID: 4AEE18F83AFDEB23
4 changed files with 20 additions and 8 deletions
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2
Core/BaseMapper.cpp
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@ -789,7 +789,7 @@ uint8_t BaseMapper::DebugReadRAM(uint16_t addr)
void BaseMapper::WriteRAM(uint16_t addr, uint8_t value)
{
if((addr == 0x4016) & (_console->GetCpu()->GetCycleCount() % 2 == 1)){ WriteEPSM(addr, value); }
if(addr == 0x4016){ WriteEPSM(addr, value); }
if ((addr >= 0x401c && addr <= 0x401f)) {WriteEPSM(addr, value); }
if(_isWriteRegisterAddr[addr]) {
if(_hasBusConflicts) {

10
Core/EPSMAudio.h
View file

@ -264,12 +264,12 @@ public:
if (!custom) {
switch (addr) {
case 0x4016:
if ((value & 0x0F) == 0x02) {writeAddr = 0x0;} //A0 = 0, A1 = 0
if ((value & 0x0F) == 0x0A) {writeAddr = 0x1;} //A0 = 1, A1 = 0
if ((value & 0x0F) == 0x06) {writeAddr = 0x2;} //A0 = 0, A1 = 1
if ((value & 0x0F) == 0x0E) {writeAddr = 0x3;} //A0 = 1, A1 = 1
if ((value & 0x0E) == 0x02) {writeAddr = 0x0;} //A0 = 0, A1 = 0
if ((value & 0x0E) == 0x0A) {writeAddr = 0x1;} //A0 = 1, A1 = 0
if ((value & 0x0E) == 0x06) {writeAddr = 0x2;} //A0 = 0, A1 = 1
if ((value & 0x0E) == 0x0E) {writeAddr = 0x3;} //A0 = 1, A1 = 1
if (value & 0x0E) {writeValue = value;}
if ((value & 0x0F) == 0x00) {
if ((value & 0x02) == 0x00) {
writeValue = (writeValue & 0xF0) | (value >> 4);
const uint8_t a0 = !!(writeAddr & 0x1);

14
Core/MemoryManager.cpp
View file

@ -10,6 +10,7 @@ MemoryManager::MemoryManager(shared_ptr<Console> console)
_console = console;
_internalRAM = new uint8_t[InternalRAMSize];
_internalRamHandler.SetInternalRam(_internalRAM);
_out1_latch = false;
_ramReadHandlers = new IMemoryHandler*[RAMSize];
_ramWriteHandlers = new IMemoryHandler*[RAMSize];
@ -125,7 +126,10 @@ uint8_t MemoryManager::Read(uint16_t addr, MemoryOperationType operationType)
_console->DebugProcessRamOperation(operationType, addr, value);
_openBusHandler.SetOpenBus(value);
if (_out1_latch && operationType == MemoryOperationType::ExecOpCode) {
_out1_latch = false;
_ramWriteHandlers[0xE000]->WriteRAM(0x4016, (value & 0xF8) + (_out_delay & 0x7));
}
return value;
}
@ -134,7 +138,13 @@ void MemoryManager::Write(uint16_t addr, uint8_t value, MemoryOperationType oper
if(_console->DebugProcessRamOperation(operationType, addr, value)) {
_ramWriteHandlers[addr]->WriteRAM(addr, value);
if (addr == 0x4016) {
_ramWriteHandlers[0xE000]->WriteRAM(addr, value);
if ((_console->GetCpu()->GetCycleCount() % 2 == 1)) {
_ramWriteHandlers[0xE000]->WriteRAM(addr, value);
}
else {
_out1_latch = true;
_out_delay = value;
}
}
}
}

2
Core/MemoryManager.h
View file

@ -24,6 +24,8 @@ class MemoryManager : public Snapshotable
InternalRamHandler<0x7FF> _internalRamHandler;
IMemoryHandler** _ramReadHandlers;
IMemoryHandler** _ramWriteHandlers;
bool _out1_latch;
uint8_t _out_delay;
void InitializeMemoryHandlers(IMemoryHandler** memoryHandlers, IMemoryHandler* handler, vector<uint16_t> *addresses, bool allowOverride);