mirror of
https://github.com/NovaSquirrel/Mesen-X.git
synced 2024-06-01 02:48:18 -04:00
78 lines
1.8 KiB
C++
78 lines
1.8 KiB
C++
#pragma once
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#include "BaseMapper.h"
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class Mapper227 : public BaseMapper
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{
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protected:
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uint32_t GetDipSwitchCount() override { return 4; }
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uint16_t GetPRGPageSize() override { return 0x4000; }
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uint16_t GetCHRPageSize() override { return 0x2000; }
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bool AllowRegisterRead() override { return true; }
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bool _mFlag;
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void InitMapper() override
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{
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WriteRegister(0x8000, 0);
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}
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void Reset(bool softreset) override
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{
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WriteRegister(0x8000, 0);
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}
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void StreamState(bool saving) override
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{
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BaseMapper::StreamState(saving);
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Stream(_mFlag);
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}
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uint8_t ReadRegister(uint16_t addr) override
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{
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if(_mFlag) {
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addr |= GetDipSwitches();
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}
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return InternalReadRam(addr);
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}
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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uint16_t prgBank = ((addr >> 2) & 0x1F) | ((addr & 0x100) >> 3);
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bool sFlag = (addr & 0x01) == 0x01;
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bool lFlag = ((addr >> 9) & 0x01) == 0x01;
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bool prgMode = ((addr >> 7) & 0x01) == 0x01;
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_mFlag = ((addr >> 10) & 0x01) == 0x01;
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if(prgMode) {
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if(sFlag) {
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SelectPrgPage2x(0, prgBank & 0xFE);
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} else {
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SelectPRGPage(0, prgBank);
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SelectPRGPage(1, prgBank);
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}
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} else {
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if(sFlag){
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if(lFlag) {
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SelectPRGPage(0, prgBank & 0x3E);
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SelectPRGPage(1, prgBank | 0x07);
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} else {
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SelectPRGPage(0, prgBank & 0x3E);
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SelectPRGPage(1, prgBank & 0x38);
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}
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} else {
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if(lFlag) {
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SelectPRGPage(0, prgBank);
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SelectPRGPage(1, prgBank | 0x07);
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} else {
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SelectPRGPage(0, prgBank);
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SelectPRGPage(1, prgBank & 0x38);
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}
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}
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}
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// protect CHR-RAM on nrom modes
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SetPpuMemoryMapping(0, 0x1FFF, 0, ChrMemoryType::Default, (!HasBattery() && prgMode) ? MemoryAccessType::Read : MemoryAccessType::ReadWrite);
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SetMirroringType((addr & 0x02) == 0x02 ? MirroringType::Horizontal : MirroringType::Vertical);
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}
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}; |