mirror of
https://github.com/SourMesen/Mesen.git
synced 2024-05-20 05:01:03 -04:00
425 lines
11 KiB
C++
425 lines
11 KiB
C++
#pragma once
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#include "stdafx.h"
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#include "BaseMapper.h"
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#include "CPU.h"
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#include "MemoryManager.h"
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class JyCompany : public BaseMapper
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{
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private:
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enum class JyIrqSource
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{
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CpuClock = 0,
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PpuA12Rise = 1,
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PpuRead = 2,
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CpuWrite = 3
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};
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uint8_t _prgRegs[4];
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uint8_t _chrLowRegs[8];
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uint8_t _chrHighRegs[8];
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uint8_t _chrLatch[2];
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uint8_t _prgMode;
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bool _enablePrgAt6000;
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uint8_t _chrMode;
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bool _chrBlockMode;
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uint8_t _chrBlock;
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bool _mirrorChr;
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uint8_t _mirroringReg;
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bool _advancedNtControl;
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bool _disableNtRam;
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uint8_t _ntRamSelectBit;
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uint8_t _ntLowRegs[4];
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uint8_t _ntHighRegs[4];
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bool _irqEnabled;
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JyIrqSource _irqSource;
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uint8_t _irqCountDirection;
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bool _irqFunkyMode;
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uint8_t _irqFunkyModeReg;
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bool _irqSmallPrescaler;
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uint8_t _irqPrescaler;
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uint8_t _irqCounter;
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uint8_t _irqXorReg;
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uint8_t _multiplyValue1;
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uint8_t _multiplyValue2;
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uint8_t _regRamValue;
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uint16_t _lastPpuAddr;
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protected:
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virtual uint16_t GetPRGPageSize() override { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x0400; }
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virtual bool AllowRegisterRead() override { return true; }
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void InitMapper() override
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{
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RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
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AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Any);
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_chrLatch[0] = 0;
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_chrLatch[1] = 4;
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memset(_prgRegs, 0, sizeof(_prgRegs));
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memset(_chrLowRegs, 0, sizeof(_chrLowRegs));
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memset(_chrHighRegs, 0, sizeof(_chrHighRegs));
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_prgMode = 0;
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_enablePrgAt6000 = false;
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_chrMode = 0;
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_chrBlockMode = false;
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_chrBlock = 0;
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_mirrorChr = false;
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_mirroringReg = 0;
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_advancedNtControl = false;
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_disableNtRam = false;
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_ntRamSelectBit = 0;
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memset(_ntLowRegs, 0, sizeof(_ntLowRegs));
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memset(_ntHighRegs, 0, sizeof(_ntHighRegs));
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_irqEnabled = false;
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_irqSource = JyIrqSource::CpuClock;
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_lastPpuAddr = 0;
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_irqCountDirection = 0;
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_irqFunkyMode = false;
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_irqFunkyModeReg = 0;
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_irqSmallPrescaler = false;
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_irqPrescaler = 0;
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_irqCounter = 0;
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_irqXorReg = 0;
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_multiplyValue1 = 0;
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_multiplyValue2 = 0;
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_regRamValue = 0;
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UpdateState();
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}
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void StreamState(bool saving) override
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{
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BaseMapper::StreamState(saving);
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ArrayInfo<uint8_t> prgRegs{ _prgRegs, 4 };
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ArrayInfo<uint8_t> chrLowRegs{ _chrLowRegs, 8 };
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ArrayInfo<uint8_t> chrHighRegs{ _chrHighRegs, 8 };
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ArrayInfo<uint8_t> ntLowRegs{ _ntLowRegs, 4 };
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ArrayInfo<uint8_t> ntHighRegs{ _ntHighRegs, 4 };
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Stream(_chrLatch[0], _chrLatch[1], _prgMode, _enablePrgAt6000, _chrMode, _chrBlockMode, _chrBlock, _mirrorChr, _mirroringReg, _advancedNtControl,
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_disableNtRam, _ntRamSelectBit, _irqEnabled, _irqSource, _lastPpuAddr, _irqCountDirection, _irqFunkyMode, _irqFunkyModeReg, _irqSmallPrescaler,
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_irqPrescaler, _irqCounter, _irqXorReg, _multiplyValue1, _multiplyValue2, _regRamValue, prgRegs, chrLowRegs, chrHighRegs, ntLowRegs, ntHighRegs);
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if(!saving) {
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UpdateState();
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}
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}
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void UpdateState()
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{
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UpdatePrgState();
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UpdateChrState();
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UpdateMirroringState();
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}
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uint8_t InvertPrgBits(uint8_t prgReg, bool needInvert)
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{
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if(needInvert) {
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return (prgReg & 0x01) << 6 | (prgReg & 0x02) << 4 | (prgReg & 0x04) << 2 | (prgReg & 0x10) >> 2 | (prgReg & 0x20) >> 4 | (prgReg & 0x40) >> 6;
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} else {
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return prgReg;
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}
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}
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void UpdatePrgState()
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{
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bool invertBits = (_prgMode & 0x03) == 0x03;
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int prgRegs[4] = { InvertPrgBits(_prgRegs[0], invertBits), InvertPrgBits(_prgRegs[1], invertBits),
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InvertPrgBits(_prgRegs[2], invertBits), InvertPrgBits(_prgRegs[3], invertBits) };
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switch(_prgMode & 0x03) {
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case 0:
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SelectPrgPage4x(0, (_prgMode & 0x04) ? prgRegs[3] : 0x3C);
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if(_enablePrgAt6000) {
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SetCpuMemoryMapping(0x6000, 0x7FFF, prgRegs[3] * 4 + 3, PrgMemoryType::PrgRom);
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}
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break;
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case 1:
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SelectPrgPage2x(0, prgRegs[1] << 1);
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SelectPrgPage2x(1, (_prgMode & 0x04) ? prgRegs[3] : 0x3E);
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if(_enablePrgAt6000) {
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SetCpuMemoryMapping(0x6000, 0x7FFF, prgRegs[3] * 2 + 1, PrgMemoryType::PrgRom);
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}
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break;
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case 2:
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case 3:
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SelectPRGPage(0, prgRegs[0]);
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SelectPRGPage(1, prgRegs[1]);
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SelectPRGPage(2, prgRegs[2]);
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SelectPRGPage(3, (_prgMode & 0x04) ? prgRegs[3] : 0x3F);
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if(_enablePrgAt6000) {
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SetCpuMemoryMapping(0x6000, 0x7FFF, prgRegs[3], PrgMemoryType::PrgRom);
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}
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break;
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}
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if(!_enablePrgAt6000) {
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RemoveCpuMemoryMapping(0x6000, 0x7FFF);
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}
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}
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uint16_t GetChrReg(int index)
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{
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if(_chrMode >= 2 && _mirrorChr && (index == 2 || index == 3)) {
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index -= 2;
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}
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if(_chrBlockMode) {
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uint8_t mask = 0;
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uint8_t shift = 0;
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switch(_chrMode) {
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default:
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case 0: mask = 0x1F; shift = 5; break;
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case 1: mask = 0x3F; shift = 6; break;
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case 2: mask = 0x7F; shift = 7; break;
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case 3: mask = 0xFF; shift = 8; break;
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}
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return (_chrLowRegs[index] & mask) | (_chrBlock << shift);
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} else {
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return _chrLowRegs[index] | (_chrHighRegs[index] << 8);
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}
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}
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void UpdateChrState()
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{
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int chrRegs[8] = { GetChrReg(0), GetChrReg(1), GetChrReg(2), GetChrReg(3), GetChrReg(4), GetChrReg(5), GetChrReg(6), GetChrReg(7) };
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switch(_chrMode) {
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case 0:
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SelectChrPage8x(0, chrRegs[0] << 3);
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break;
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case 1:
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SelectChrPage4x(0, chrRegs[_chrLatch[0]] << 2);
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SelectChrPage4x(1, chrRegs[_chrLatch[1]] << 2);
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break;
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case 2:
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SelectChrPage2x(0, chrRegs[0] << 1);
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SelectChrPage2x(1, chrRegs[2] << 1);
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SelectChrPage2x(2, chrRegs[4] << 1);
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SelectChrPage2x(3, chrRegs[6] << 1);
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break;
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case 3:
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for(int i = 0; i < 8; i++) {
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SelectCHRPage(i, chrRegs[i]);
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}
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break;
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}
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}
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void UpdateMirroringState()
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{
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//"Mapper 211 behaves as though N were always set (1), and mapper 090 behaves as though N were always clear(0)."
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if((_advancedNtControl || _romInfo.MapperID == 211) && _romInfo.MapperID != 90) {
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for(int i = 0; i < 4; i++) {
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SetNametable(i, _ntLowRegs[i] & 0x01);
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}
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} else {
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switch(_mirroringReg) {
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case 0: SetMirroringType(MirroringType::Vertical); break;
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case 1: SetMirroringType(MirroringType::Horizontal); break;
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case 2: SetMirroringType(MirroringType::ScreenAOnly); break;
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case 3: SetMirroringType(MirroringType::ScreenBOnly); break;
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}
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}
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}
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uint8_t ReadRegister(uint16_t addr) override
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{
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switch(addr & 0xF803) {
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case 0x5000: return 0; //Dip switches
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case 0x5800: return (_multiplyValue1 * _multiplyValue2) & 0xFF;
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case 0x5801: return ((_multiplyValue1 * _multiplyValue2) >> 8) & 0xFF;
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case 0x5803: return _regRamValue;
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}
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return _console->GetMemoryManager()->GetOpenBus();
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}
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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if(addr < 0x8000) {
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switch(addr & 0xF803) {
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case 0x5800: _multiplyValue1 = value; break;
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case 0x5801: _multiplyValue2 = value; break;
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case 0x5803: _regRamValue = value; break;
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}
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} else {
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switch(addr & 0xF007) {
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case 0x8000: case 0x8001: case 0x8002: case 0x8003:
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case 0x8004: case 0x8005: case 0x8006: case 0x8007:
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_prgRegs[addr & 0x03] = value & 0x7F;
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break;
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case 0x9000: case 0x9001: case 0x9002: case 0x9003:
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case 0x9004: case 0x9005: case 0x9006: case 0x9007:
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_chrLowRegs[addr & 0x07] = value;
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break;
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case 0xA000: case 0xA001: case 0xA002: case 0xA003:
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case 0xA004: case 0xA005: case 0xA006: case 0xA007:
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_chrHighRegs[addr & 0x07] = value;
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break;
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case 0xB000: case 0xB001: case 0xB002: case 0xB003:
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_ntLowRegs[addr & 0x03] = value;
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break;
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case 0xB004: case 0xB005: case 0xB006: case 0xB007:
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_ntHighRegs[addr & 0x03] = value;
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break;
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case 0xC000:
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if(value & 0x01) {
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_irqEnabled = true;
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} else {
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_irqEnabled = false;
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_console->GetCpu()->ClearIrqSource(IRQSource::External);
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}
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break;
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case 0xC001:
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_irqCountDirection = (value >> 6) & 0x03;
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_irqFunkyMode = (value & 0x08) == 0x08;
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_irqSmallPrescaler = ((value >> 2) & 0x01) == 0x01;
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_irqSource = (JyIrqSource)(value & 0x03);
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break;
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case 0xC002:
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_irqEnabled = false;
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_console->GetCpu()->ClearIrqSource(IRQSource::External);
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break;
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case 0xC003: _irqEnabled = true; break;
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case 0xC004: _irqPrescaler = value ^ _irqXorReg; break;
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case 0xC005: _irqCounter = value ^ _irqXorReg; break;
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case 0xC006: _irqXorReg = value; break;
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case 0xC007: _irqFunkyModeReg = value; break;
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case 0xD000:
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_prgMode = value & 0x07;
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_chrMode = (value >> 3) & 0x03;
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_advancedNtControl = (value & 0x20) == 0x20;
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_disableNtRam = (value & 0x40) == 0x40;
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_enablePrgAt6000 = (value & 0x80) == 0x80;
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break;
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case 0xD001: _mirroringReg = value & 0x03; break;
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case 0xD002: _ntRamSelectBit = value & 0x80; break;
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case 0xD003:
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_mirrorChr = (value & 0x80) == 0x80;
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_chrBlockMode = (value & 0x20) == 0x00;
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_chrBlock = ((value & 0x18) >> 2) | (value & 0x01);
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break;
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}
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}
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UpdateState();
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}
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void ProcessCpuClock() override
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{
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if(_irqSource == JyIrqSource::CpuClock || (_irqSource == JyIrqSource::CpuWrite && _console->GetCpu()->IsCpuWrite())) {
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TickIrqCounter();
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}
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}
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uint8_t MapperReadVRAM(uint16_t addr, MemoryOperationType type) override
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{
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if(_irqSource == JyIrqSource::PpuRead && type == MemoryOperationType::PpuRenderingRead) {
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TickIrqCounter();
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}
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if(addr >= 0x2000) {
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//This behavior only affects reads, not writes.
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//Additional info: https://forums.nesdev.com/viewtopic.php?f=3&t=17198
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if((_advancedNtControl || _romInfo.MapperID == 211) && _romInfo.MapperID != 90) {
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uint8_t ntIndex = ((addr & 0x2FFF) - 0x2000) / 0x400;
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if(_disableNtRam || (_ntLowRegs[ntIndex] & 0x80) != (_ntRamSelectBit & 0x80)) {
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uint16_t chrPage = _ntLowRegs[ntIndex] | (_ntHighRegs[ntIndex] << 8);
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uint32_t chrOffset = chrPage * 0x400 + (addr & 0x3FF);
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if(_chrRomSize > chrOffset) {
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return _chrRom[chrOffset];
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} else {
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return 0;
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}
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}
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}
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}
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return BaseMapper::MapperReadVRAM(addr, type);
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}
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void NotifyVRAMAddressChange(uint16_t addr) override
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{
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if(_irqSource == JyIrqSource::PpuA12Rise && (addr & 0x1000) && !(_lastPpuAddr & 0x1000)) {
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TickIrqCounter();
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}
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_lastPpuAddr = addr;
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if(_romInfo.MapperID == 209) {
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switch(addr & 0x2FF8) {
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case 0x0FD8:
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case 0x0FE8:
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_chrLatch[addr >> 12] = addr >> 4 & ((addr >> 10 & 0x04) | 0x02);
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UpdateChrState();
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break;
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}
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}
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}
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void TickIrqCounter()
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{
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bool clockIrqCounter = false;
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uint8_t mask = _irqSmallPrescaler ? 0x07 : 0xFF;
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uint8_t prescaler = _irqPrescaler & mask;
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if(_irqCountDirection == 0x01) {
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prescaler++;
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if((prescaler & mask) == 0) {
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clockIrqCounter = true;
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}
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} else if(_irqCountDirection == 0x02) {
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if(--prescaler == 0) {
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clockIrqCounter = true;
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}
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}
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_irqPrescaler = (_irqPrescaler & ~mask) | (prescaler & mask);
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if(clockIrqCounter) {
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if(_irqCountDirection == 0x01) {
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_irqCounter++;
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if(_irqCounter == 0 && _irqEnabled) {
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_console->GetCpu()->SetIrqSource(IRQSource::External);
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}
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} else if(_irqCountDirection == 0x02) {
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_irqCounter--;
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if(_irqCounter == 0xFF && _irqEnabled) {
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_console->GetCpu()->SetIrqSource(IRQSource::External);
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}
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}
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}
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}
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}; |