mirror of
https://github.com/tpunix/SAROO.git
synced 2024-06-01 11:57:19 -04:00
FPGA bugfix
MCU bugfix
This commit is contained in:
tpu
parent
19b2e5c180
commit
d12cadbbc1
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@ -5,6 +5,10 @@
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// version 0.1: first step.
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// 0.2: for HW1.2
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// 0.3:
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// 0.4: support put_sector_data
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// 0.5: CDC bug fix
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module SSMaster(
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// System
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@ -227,9 +231,10 @@ module SSMaster(
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if(NRESET==0) begin
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st_reg_ctrl <= 0;
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st_reg_spi <= 3'b111;
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st_reg_sdram <= 12'b11_1100001101; // type:64MB refcnt: 0x30d(7.81us)
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end else if(st_wr_start==1) begin
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h04) st_reg_ctrl <= ST_AD;
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h16) st_reg_spi <= ST_AD[3:1];
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h16) {st_reg_sdram, st_reg_spi} <= ST_AD[15:1];
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h20) ss_resp1 <= ST_AD;
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h22) ss_resp2 <= ST_AD;
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if(fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h24) ss_resp3 <= ST_AD;
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@ -369,16 +374,17 @@ module SSMaster(
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begin
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st_reg_data_out <=
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(fsmc_addr[7:0]==8'h00)? 16'h5253 : // ID: "SR"
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(fsmc_addr[7:0]==8'h02)? 16'h1204 : // ver: HW1.2 && SW0.4
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(fsmc_addr[7:0]==8'h02)? 16'h1205 : // ver: HW1.2 && SW0.5
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(fsmc_addr[7:0]==8'h04)? st_reg_ctrl :
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(fsmc_addr[7:0]==8'h06)? st_reg_stat :
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(fsmc_addr[7:0]==8'h08)? st_fifo_data_out :
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(fsmc_addr[7:0]==8'h0a)? st_fifo_data_out :
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(fsmc_addr[7:0]==8'h0c)? st_fifo_stat :
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(fsmc_addr[7:0]==8'h0e)? st_fifo_rcnt :
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(fsmc_addr[7:0]==8'h10)? ss_reg_cmd :
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(fsmc_addr[7:0]==8'h12)? ss_reg_data :
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(fsmc_addr[7:0]==8'h14)? ss_reg_ctrl :
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(fsmc_addr[7:0]==8'h16)? {12'b0, EPCS_CS, EPCS_CLK, EPCS_DI, EPCS_DO} :
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(fsmc_addr[7:0]==8'h16)? {st_reg_sdram, EPCS_CS, EPCS_CLK, EPCS_DI, EPCS_DO} :
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(fsmc_addr[7:0]==8'h18)? ss_resp1 :
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(fsmc_addr[7:0]==8'h1a)? ss_resp2 :
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@ -440,7 +446,7 @@ module SSMaster(
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always @(posedge mclk)
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begin
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sscs_s0 <= (SS_CS0 & SS_CS1 & SS_CS2);
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sscs_s0 <= (SS_CS0 & SS_CS1 & SS_CS2) | ~SS_FC1;
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sscs_s1 <= sscs_s0;
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sscs_s2 <= sscs_s1;
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sscs_s3 <= sscs_s2;
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@ -463,7 +469,7 @@ module SSMaster(
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(SS_RD==0 && ss_cdc_cs==1)? ss_cdc_data_out :
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16'hzzzz;
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assign SS_DATA_OE = (SS_CS0==1 && SS_CS1==1 && (SS_CS2==1 || (ss_cdc_cs==1 && SS_RD==0 && ss_cdc_en==0)));
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assign SS_DATA_OE = ~SS_FC1 | (SS_CS0==1 && SS_CS1==1 && (SS_CS2==1 || (ss_cdc_cs==1 && SS_RD==0 && ss_cdc_en==0)));
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assign SS_DATA_DIR = (SS_WR0 & SS_WR1);
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@ -497,7 +503,7 @@ module SSMaster(
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begin
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ss_bcr_data_out <=
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(SS_ADDR[5:1]==5'b00_000)? 16'h5253 : // ID: "SR"
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(SS_ADDR[5:1]==5'b00_001)? 16'h1204 : // ver: HW1.2 && SW0.4
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(SS_ADDR[5:1]==5'b00_001)? 16'h1205 : // ver: HW1.2 && SW0.5
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(SS_ADDR[5:2]==4'b00_01 )? ss_reg_ctrl :
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(SS_ADDR[5:2]==4'b00_10 )? ss_reg_stat :
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(SS_ADDR[5:1]==5'b00_110)? ss_reg_timer[31:16] :
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@ -594,6 +600,19 @@ module SSMaster(
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.full(fifo_full)
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);
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// Saturn set and STM32 reset
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reg[15:0] st_fifo_rcnt;
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always @(negedge NRESET or posedge mclk)
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begin
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if(NRESET==0)
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st_fifo_rcnt <= 4'b0000;
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else if(st_wr_start==1 && fsmc_addr[24]==0 && fsmc_addr[7:0]==8'h0e)
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st_fifo_rcnt <= 0;
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else if(ss_fifo_read)
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st_fifo_rcnt <= st_fifo_rcnt+1'b1;
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end
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///////////////////////////////////////////////////////
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// SATURN CDC //
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///////////////////////////////////////////////////////
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@ -649,7 +668,8 @@ module SSMaster(
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// SDRAM //
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///////////////////////////////////////////////////////
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reg[11:0] st_reg_sdram;
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// STM32 is LittleEndian system
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wire[25:0] st_ram_addr = {2'b0, fsmc_addr[23:0]};
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wire[ 1:0] st_mask = {ST_BL1,ST_BL0};
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@ -689,7 +709,7 @@ module SSMaster(
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NRESET, mclk,
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ss_ram_cs, ss_rd_start, ss_wr_start, ss_mask, ss_ram_wait, ss_ram_addr, ss_ram_din, ss_ram_dout,
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st_ram_cs, st_rd_start, st_wr_start, st_mask, st_ram_wait, st_ram_addr, ST_AD, st_ram_data_out,
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SD_CKE, SD_CS, SD_RAS, SD_CAS, SD_WE, SD_ADDR, SD_BA, SD_DQM, SD_DQ, ss_refresh
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SD_CKE, SD_CS, SD_RAS, SD_CAS, SD_WE, SD_ADDR, SD_BA, SD_DQM, SD_DQ, ss_refresh, st_reg_sdram
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);
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assign SD_CLK = sdclk;
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@ -8,7 +8,7 @@ module memhub(
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cs_a, rd_a, wr_a, mask_a, nwait_a, addr_a, wdata_a, rdata_a,
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cs_b, rd_b, wr_b, mask_b, nwait_b, addr_b, wdata_b, rdata_b,
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sd_cke, sd_cs, sd_ras, sd_cas, sd_we, sd_addr, sd_ba, sd_dqm, sd_data,
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ext_refresh
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ext_refresh, reg_sdram
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);
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///////////////////////////////////////////////////////
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@ -50,6 +50,7 @@ module memhub(
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output[ 1:0] sd_dqm;
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inout [15:0] sd_data;
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input ext_refresh;
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input [11:0] reg_sdram;
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///////////////////////////////////////////////////////
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@ -186,7 +187,7 @@ module memhub(
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wire sd_oe;
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tsdram _tsd(
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reset, clk,
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reset, clk, reg_sdram,
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ext_refresh, cmd_req, cmd_ack, cmd_mask, cmd_addr, cmd_din, cmd_dout, data_valid,
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sd_cke, sd_cs, sd_ras, sd_cas, sd_we, sd_addr, sd_ba, sd_dqm, sd_data, sd_dout, sd_oe
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);
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@ -6,6 +6,7 @@
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module tsdram(
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reset,
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clk,
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reg_sdram,
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ext_refresh,
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cmd_req,
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@ -37,6 +38,7 @@ module tsdram(
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input reset;
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input clk;
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input [11:0] reg_sdram;
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input ext_refresh;
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input [ 1:0] cmd_req;
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@ -87,15 +89,40 @@ module tsdram(
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///////////////////////////////////////////////////////
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// A31 - A26 [A25 - A13] [A12 A11] [A10 - A1] A0
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// [R12 - R0] [ B1 B0] [ C9 - C0]
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// [R12 - R0] [ B1 B0] [ C9 - C0] 64MB
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//
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// A31 - A25 [A24 - A12] [A11 A10] [ A9 - A1] A0
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// [R12 - R0] [ B1 B0] [ C8 - C0] 32MB
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//
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// A31 - A24 [A23 - A12] [A11 A10] [ A9 - A1] A0
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// [R11 - R0] [ B1 B0] [ C8 - C0] 16MB
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//
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// A31 - A23 [A22 - A11] [A10 A9] [ A8 - A1] A0
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// [R11 - R0] [ B1 B0] [ C7 - C0] 8MB
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localparam BANK_POS = COL_BITS+1;
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localparam ROW_POS = BANK_POS+2;
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wire[ROW_BITS-1:0] col_addr = {3'b001, {(10-COL_BITS){1'b0}}, cmd_addr[COL_BITS:1]};
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// wire[ROW_BITS-1:0] col_addr = {3'b001, {(10-COL_BITS){1'b0}}, cmd_addr[COL_BITS:1]};
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// wire[1:0] bank_addr = cmd_addr[COL_BITS+2:COL_BITS+1];
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// wire[ROW_BITS-1:0] row_addr = cmd_addr[ROW_BITS+COL_BITS+2:COL_BITS+3];
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wire[1:0] bank_addr = cmd_addr[COL_BITS+2:COL_BITS+1];
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wire[ROW_BITS-1:0] row_addr = cmd_addr[ROW_BITS+COL_BITS+2:COL_BITS+3];
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wire[1:0] sdtype = reg_sdram[11:10];
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wire[12:0] col_addr =
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(sdtype==2'b11)? {3'b001, cmd_addr[10:1]} :
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(sdtype==2'b10)? {4'b0010, cmd_addr[ 9:1]} :
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(sdtype==2'b01)? {4'b0010, cmd_addr[ 9:1]} :
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{5'b00100, cmd_addr[ 8:1]} ;
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wire[1:0] bank_addr =
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(sdtype==2'b11)? cmd_addr[12:11] :
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(sdtype==2'b10)? cmd_addr[11:10] :
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(sdtype==2'b01)? cmd_addr[11:10] :
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cmd_addr[10: 9] ;
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wire[12:0] row_addr =
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(sdtype==2'b11)? cmd_addr[25:13] :
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(sdtype==2'b10)? cmd_addr[24:12] :
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(sdtype==2'b01)? {1'b0, cmd_addr[23:12]} :
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{1'b0, cmd_addr[22:11]} ;
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///////////////////////////////////////////////////////
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@ -110,7 +137,8 @@ module tsdram(
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if(reset==0) begin
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ref_count <= tPOR_count[15:0];
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end else if(ref_ack) begin
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ref_count <= tREF_count[15:0];
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// ref_count <= tREF_count[15:0];
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ref_count <= {6'b0, reg_sdram[9:0]};
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end else if(ref_count) begin
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ref_count <= ref_count-1'b1;
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end
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@ -244,25 +244,53 @@ int flash_update(int check)
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_puts("erase ...\n");
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retv = flash_erase(firm_addr);
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if(retv){
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restore_irq(key);
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_puts(" faile!\n");
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return -2;
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retv = -2;
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goto _exit;
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}
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_puts("write ...\n");
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for(i=0; i<fsize; i+=32){
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retv = flash_write32(firm_addr+i, fbuf+i);
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if(retv){
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restore_irq(key);
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_puts(" faile!\n");
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return -3;
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retv = -3;
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goto _exit;
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}
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}
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_exit:
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if(retv){
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_puts(" faile!\n");
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}
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*(volatile u16*)(0x60000012) = retv;
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*(volatile u16*)(0x60000010) = 0;
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restore_irq(key);
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printk("MCU update OK!\n");
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f_unlink("/SAROO/update/ssmaster.bin");
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if(retv==0){
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_puts("MCU update OK!\n");
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f_unlink("/SAROO/update/ssmaster.bin");
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}
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return retv;
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}
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int flash_write_config(u8 *cfgbuf)
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{
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int retv;
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retv = flash_erase(0x080e0000);
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if(retv){
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printk("erase failed! %08x\n", retv);
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return retv;
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}
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retv = flash_write32(0x080e0000, cfgbuf);
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if(retv){
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printk("write failed! %08x\n", retv);
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return retv;
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}
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return 0;
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}
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@ -296,6 +296,17 @@ void simple_shell(void)
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CMD(flu){
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flash_update(0);
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}
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CMD(sdram){
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void sdram_config(int type, int reftime);
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int type=3, reftime=64;
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if(argc>=1){
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type = arg[0];
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}
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if(argc>=2){
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reftime = arg[1];
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}
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sdram_config(type, reftime);
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}
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CMD(mmt){
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u32 addr = 0x61000000;
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@ -378,6 +389,10 @@ void simple_shell(void)
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printk("create exram.bin failed! %d\n", retv);
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}
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}
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CMD(pt){
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void show_pt(int id);
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show_pt(arg[0]);
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}
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CMD(q){
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break;
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@ -24,7 +24,7 @@ void fspi_setcs(int val)
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if(val)
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ctrl |= 0x08;
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else
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ctrl &= 0x07;
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ctrl &= ~0x08;
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*(volatile u16*)(0x60000016) = ctrl;
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}
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@ -34,7 +34,7 @@ void fspi_setclk(int val)
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if(val)
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ctrl |= 0x04;
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else
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ctrl &= 0x0b;
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ctrl &= ~0x04;
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*(volatile u16*)(0x60000016) = ctrl;
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}
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@ -44,7 +44,7 @@ void fspi_setdi(int val)
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if(val)
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ctrl |= 0x02;
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else
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ctrl &= 0x0d;
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ctrl &= ~0x02;
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*(volatile u16*)(0x60000016) = ctrl;
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}
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@ -124,6 +124,25 @@ int epcs_status(void)
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return status;
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}
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int epcs_wstat(int stat)
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{
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// status write enable
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fspi_setcs(0);
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fspi_delay();
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fspi_trans(0x50);
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fspi_setcs(1);
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fspi_delay();
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fspi_setcs(0);
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fspi_delay();
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fspi_trans(0x01);
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fspi_trans(stat);
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fspi_setcs(1);
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fspi_delay();
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return 0;
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}
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int epcs_wen(int en)
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{
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fspi_setcs(0);
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@ -173,7 +192,7 @@ int epcs_sector_erase(int addr)
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return 0;
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}
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int epcs_page_write(int addr, u8 *buf)
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int epcs_page_write(int addr, u8 *buf, int size)
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{
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int i;
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@ -187,7 +206,7 @@ int epcs_page_write(int addr, u8 *buf)
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fspi_trans((addr>> 8)&0xff);
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fspi_trans((addr>> 0)&0xff);
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for(i=0; i<256; i++){
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for(i=0; i<size; i++){
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fspi_trans(buf[i]);
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}
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@ -253,20 +272,35 @@ int fpga_update(int check)
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return 0;
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}
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int fid = epcs_readid();
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printk("EPCS ID: %08x\n", fid);
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printk("EPCS ID: %08x\n", epcs_readid());
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if(fid==0xbf8e){
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// SST25VF080 上电默认写保护
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epcs_wstat(0);
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}
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printk("EPCS SR: %02x\n", epcs_status());
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printk("Erase ...\n");
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for(addr=0; addr<fsize; addr+=4096){
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epcs_sector_erase(addr);
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}
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printk("Write ...\n");
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for(addr=0; addr<fsize; addr+=256){
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u32 rv;
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f_read(&fp, fbuf, 256, &rv);
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for(i=0; i<256; i++){ // Altera need LSB first
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fbuf[i] = rbit_u8(fbuf[i]);
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}
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epcs_page_write(addr, fbuf);
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if(fid==0xbf8e){
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// SST25VF080 的02命令只能写一个字节
|
||||
for(i=0; i<256; i++){
|
||||
epcs_page_write(addr+i, fbuf+i, 1);
|
||||
}
|
||||
}else{
|
||||
epcs_page_write(addr, fbuf, 256);
|
||||
}
|
||||
}
|
||||
f_close(&fp);
|
||||
|
||||
|
|
@ -279,6 +313,53 @@ int fpga_update(int check)
|
|||
/******************************************************************************/
|
||||
|
||||
|
||||
void sdram_config(int type, int reftime)
|
||||
{
|
||||
u32 cfgbuf[8];
|
||||
int div, rcnt;
|
||||
|
||||
if(type==3 || type==2){
|
||||
// 64MB/32MB, row=13
|
||||
rcnt = reftime*100000/8192;
|
||||
}else if(type==1 || type==0){
|
||||
// 16MB/8MB, row=12
|
||||
rcnt = reftime*100000/4096;
|
||||
}else{
|
||||
printk("Invalid sdram config!\n");
|
||||
return;
|
||||
}
|
||||
printk("SDRAM type: %d refcnt: %d\n", type, rcnt);
|
||||
|
||||
memset(cfgbuf, 0xff, 32);
|
||||
cfgbuf[0] = 0x43524453; // "SDRC"
|
||||
cfgbuf[1] = (type<<10) | (rcnt&0x3ff);
|
||||
|
||||
flash_write_config((u8*)cfgbuf);
|
||||
}
|
||||
|
||||
|
||||
void sdram_set(void)
|
||||
{
|
||||
u32 *cfgbuf = (u32*)0x080e0000;
|
||||
int type, rcnt;
|
||||
|
||||
if(cfgbuf[0]!=0x43524453)
|
||||
return;
|
||||
|
||||
type = (cfgbuf[1]>>10)&3;
|
||||
rcnt = (cfgbuf[1])&0x3ff;
|
||||
printk("SDRAM type: %d refcnt: %d\n", type, rcnt);
|
||||
|
||||
int ctrl = *(volatile u16*)(0x60000016);
|
||||
ctrl &= 0x000f;
|
||||
ctrl |= (type<<14) | (rcnt<<4);
|
||||
*(volatile u16*)(0x60000016) = ctrl;
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
|
||||
int fpga_config_done(void)
|
||||
{
|
||||
return (GPIOB->IDR&0x0800)? 1 : 0;
|
||||
|
|
@ -342,6 +423,8 @@ void fpga_config(void)
|
|||
printk(" status: %d\n", fpga_status());
|
||||
printk("\n");
|
||||
|
||||
sdram_set();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -218,6 +218,7 @@ void uart4_init(void)
|
|||
UART4->BRR = 0x0; // Reset
|
||||
// UART4->BRR = 0x0364; // 设置波特比率寄存器为115200(100M/115200)
|
||||
UART4->BRR = 0x0064; // 设置波特比率寄存器为1M(100M/1M)
|
||||
// UART4->BRR = 0x0032; // 设置波特比率寄存器为2M(100M/2M)
|
||||
UART4->RQR = 0x0018;
|
||||
UART4->CR1 |= 0x0001; // Enable UART4
|
||||
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#define ST_STAT REG16(FPGA_BASE+0x06)
|
||||
#define FIFO_DATA REG16(FPGA_BASE+0x08)
|
||||
#define FIFO_STAT REG16(FPGA_BASE+0x0c)
|
||||
#define FIFO_RCNT REG16(FPGA_BASE+0x0e)
|
||||
#define SS_CMD REG16(FPGA_BASE+0x10)
|
||||
#define SS_ARG REG16(FPGA_BASE+0x12)
|
||||
#define SS_CTRL REG16(FPGA_BASE+0x14)
|
||||
|
|
|
|||
|
|
@ -176,6 +176,7 @@ void trans_start(void)
|
|||
cdb.trans_size = 24;
|
||||
}
|
||||
|
||||
FIFO_RCNT = 0;
|
||||
ST_CTRL &= ~0x0200;
|
||||
fill_fifo(dp, cdb.trans_size);
|
||||
ST_STAT = STIRQ_DAT;
|
||||
|
|
@ -216,17 +217,16 @@ void trans_handle(void)
|
|||
ST_CTRL &= ~STIRQ_DAT;
|
||||
//printk("trans_put: FIFO_STAT=%04x\n", FIFO_STAT);
|
||||
int cnt = 2048;
|
||||
int offs = 0;
|
||||
if(cdb.put_sector_size==2048){
|
||||
offs = 24;
|
||||
}else if(cdb.put_sector_size==2336){
|
||||
offs = 16;
|
||||
}else if(cdb.put_sector_size==2340){
|
||||
offs= 12;
|
||||
}
|
||||
while(cnt){
|
||||
if(bt->size==0){
|
||||
if(cdb.put_sector_size==2048){
|
||||
bt->size = 24;
|
||||
}else if(cdb.put_sector_size==2336){
|
||||
bt->size = 16;
|
||||
}else if(cdb.put_sector_size==2340){
|
||||
bt->size = 12;
|
||||
}
|
||||
}
|
||||
*(u16*)(bt->data + bt->size) = FIFO_DATA;
|
||||
*(u16*)(bt->data + offs + bt->size) = FIFO_DATA;
|
||||
bt->size += 2;
|
||||
cnt -= 2;
|
||||
if(bt->size == cdb.put_sector_size){
|
||||
|
|
@ -300,6 +300,7 @@ void trans_handle(void)
|
|||
HIRQ = HIRQ_SCDQ;
|
||||
}
|
||||
}else{
|
||||
cdb.trans_finish = 1;
|
||||
ST_CTRL &= ~STIRQ_DAT;
|
||||
}
|
||||
}
|
||||
|
|
@ -450,11 +451,15 @@ int filter_sector(TRACK_INFO *track, BLOCK *wblk)
|
|||
// 普通命令
|
||||
|
||||
|
||||
static int old_status;
|
||||
// 0x00 [SR]
|
||||
int get_cd_status(void)
|
||||
{
|
||||
set_report(cdb.status);
|
||||
SSLOG(_DEBUG, " %02x\n", cdb.status);
|
||||
if(old_status!=cdb.status){
|
||||
SSLOG(_DEBUG, " %02x\n", cdb.status);
|
||||
old_status = cdb.status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -478,7 +483,7 @@ int get_toc_info(void)
|
|||
SSLOG(_INFO, "get_toc_info\n");
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -599,7 +604,7 @@ int end_trans(void)
|
|||
}
|
||||
}
|
||||
}else{
|
||||
SSLOG(_BUFIO, "end_trans: cdwnum=%08x FIFO_STAT=%08x min_num=%d\n", cdb.cdwnum, FIFO_STAT, min_num);
|
||||
SSLOG(_BUFIO, "end_trans: cdwnum=%08x FIFO_STAT=%08x RCNT=%04x min_num=%d\n", cdb.cdwnum, FIFO_STAT, FIFO_RCNT, min_num);
|
||||
fifo_remain = (FIFO_STAT&0x0fff)*2; // FIFO中还有多少字节未读
|
||||
if(fifo_remain>=512){
|
||||
//FIFO中的数据大于512字节，不会产生中断。cdwnum会少记一次。
|
||||
|
|
@ -667,6 +672,7 @@ int play_cd(void)
|
|||
|
||||
HIRQ_CLR = HIRQ_PEND;
|
||||
|
||||
int play_tno = 0;
|
||||
if(start_pos==0xffffff){
|
||||
// PTYPE_NOCHG
|
||||
}else if(start_pos&0x800000){
|
||||
|
|
@ -681,7 +687,7 @@ int play_cd(void)
|
|||
cdb.play_fad_start = track_to_fad(start_pos);
|
||||
cdb.track = (start_pos>>8)&0xff;
|
||||
cdb.index = start_pos&0xff;
|
||||
mode &= 0x7f;
|
||||
play_tno = 1;
|
||||
}
|
||||
|
||||
if(end_pos==0xffffff){
|
||||
|
|
@ -695,6 +701,11 @@ int play_cd(void)
|
|||
cdb.play_fad_end = track_to_fad(end_pos);
|
||||
else
|
||||
cdb.play_fad_end = track_to_fad((end_pos&0xff00)|0x63);
|
||||
if(play_tno){
|
||||
// STEAM-HEART'S fixup
|
||||
// 明确指定start与stop的情况下,强制更新fad.
|
||||
cdb.fad = cdb.play_fad_start;
|
||||
}
|
||||
}else{
|
||||
// PTYPE_DFL
|
||||
cdb.play_fad_end = track_to_fad(0xffff);
|
||||
|
|
@ -744,6 +755,10 @@ int seek_cd(void)
|
|||
cdb.index = 1;
|
||||
cdb.options = 0x00;
|
||||
cdb.repcnt = 0;
|
||||
// 三国志: 吞食天地2
|
||||
// Seek后, Play(00ffffff, 00ffffff, ff).
|
||||
// 需要指定play_fad_end以免Play多读数据.
|
||||
cdb.play_fad_end = 0;
|
||||
}else{
|
||||
// PTYPE_TNO
|
||||
if(pos){
|
||||
|
|
@ -800,7 +815,7 @@ int get_subcode(void)
|
|||
int rel_fad, rm, rs, rf, m, s, f;
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1243,7 +1258,7 @@ int get_sector_data(void)
|
|||
PARTITION *pp;
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1260,18 +1275,20 @@ int get_sector_data(void)
|
|||
snum = pp->numblocks-spos;
|
||||
}
|
||||
SSLOG(_BUFIO, "get_sector_data: part=%d(%d) spos=%d snum=%d\n", pt, pp->numblocks, spos, snum);
|
||||
if(spos<0 || snum<=0 || (spos+snum) > pp->numblocks){
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
gs_spos = spos;
|
||||
gs_snum = snum;
|
||||
|
||||
if(pp->numblocks){
|
||||
cdb.trans_type = TRANS_DATA;
|
||||
cdb.trans_part_index = pt;
|
||||
cdb.trans_block_start = spos;
|
||||
cdb.trans_block_end = spos+snum;
|
||||
cdb.trans_type = TRANS_DATA;
|
||||
cdb.trans_part_index = pt;
|
||||
cdb.trans_block_start = spos;
|
||||
cdb.trans_block_end = spos+snum;
|
||||
trans_start();
|
||||
|
||||
trans_start();
|
||||
}
|
||||
set_status(0x4000 | cdb.status);
|
||||
set_status(STAT_TRNS | cdb.status);
|
||||
return HIRQ_DRDY|HIRQ_EHST;
|
||||
}
|
||||
|
||||
|
|
@ -1293,14 +1310,15 @@ int del_sector_data(void)
|
|||
if(spos==0xffff){
|
||||
spos = pp->numblocks-1;
|
||||
}
|
||||
if(spos>=pp->numblocks){
|
||||
// 梦幻之星1会传入spos=180导致后续错误
|
||||
spos = 0;
|
||||
}
|
||||
if(snum==0xffff){
|
||||
snum = pp->numblocks-spos;
|
||||
}
|
||||
SSLOG(_BUFIO, "del_sector_data: part=%d spos=%d snum=%d\n", pt, spos, snum);
|
||||
if(spos<0 || snum<=0 || (spos+snum) > pp->numblocks){
|
||||
// 梦幻之星1会传入spos=180导致后续错误
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
while(snum){
|
||||
remove_block(pp, spos);
|
||||
|
|
@ -1319,7 +1337,7 @@ int get_del_sector_data(void)
|
|||
gs_snum = 0;
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1328,47 +1346,27 @@ int get_del_sector_data(void)
|
|||
snum = cdb.cr4;
|
||||
pp = &cdb.part[pt];
|
||||
|
||||
if(pp->numblocks){
|
||||
if(spos==0xffff){
|
||||
spos = pp->numblocks-1;
|
||||
}
|
||||
if(snum==0xffff){
|
||||
snum = pp->numblocks-spos;
|
||||
}
|
||||
}else{
|
||||
if(spos==0xffff){
|
||||
spos = 0;
|
||||
}
|
||||
if(snum==0xffff){
|
||||
snum = 0;
|
||||
}
|
||||
}
|
||||
|
||||
SSLOG(_BUFIO, "get_del_sector_data: part=%d(%d) spos=%d snum=%d\n", pt, pp->numblocks, spos, snum);
|
||||
if(snum==0){
|
||||
// 针对<重装机兵2雷诺斯>的临时处理
|
||||
while(cdb.play_type){
|
||||
cdc_delay(10);
|
||||
}
|
||||
snum = pp->numblocks;
|
||||
}else{
|
||||
while(pp->numblocks<snum){
|
||||
// 在这里等待并不是个好办法.
|
||||
cdc_delay(10);
|
||||
}
|
||||
if(spos==0xffff){
|
||||
spos = pp->numblocks-1;
|
||||
}
|
||||
if(snum==0xffff){
|
||||
snum = pp->numblocks-spos;
|
||||
}
|
||||
SSLOG(_BUFIO, " : part=%d(%d) spos=%d snum=%d\n", pt, pp->numblocks, spos, snum);
|
||||
|
||||
if(pp->numblocks){
|
||||
cdb.trans_type = TRANS_DATA_DEL;
|
||||
cdb.trans_part_index = pt;
|
||||
cdb.trans_block_start = spos;
|
||||
cdb.trans_block_end = spos+snum;
|
||||
|
||||
trans_start();
|
||||
if(spos<0 || snum<=0 || (spos+snum) > pp->numblocks){
|
||||
// 格兰蒂亚: 传入了snum=0. 似乎应该直接返回.
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
set_status(0x4000 | cdb.status);
|
||||
cdb.trans_type = TRANS_DATA_DEL;
|
||||
cdb.trans_part_index = pt;
|
||||
cdb.trans_block_start = spos;
|
||||
cdb.trans_block_end = spos+snum;
|
||||
trans_start();
|
||||
|
||||
set_status(STAT_TRNS | cdb.status);
|
||||
return HIRQ_DRDY|HIRQ_EHST;
|
||||
}
|
||||
|
||||
|
|
@ -1380,7 +1378,7 @@ int put_sector_data(void)
|
|||
PARTITION *pp;
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1525,9 +1523,9 @@ int handle_diread(void)
|
|||
SSLOG(_FILEIO, " cdir_lba=%08x size=%08x\n", cdb.cdir_lba, cdb.cdir_size);
|
||||
fill_fileinfo();
|
||||
free_partition(pt);
|
||||
HIRQ = HIRQ_EFLS;
|
||||
}
|
||||
|
||||
HIRQ = HIRQ_EFLS;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1661,7 +1659,7 @@ int get_file_info(void)
|
|||
int i;
|
||||
|
||||
if(cdb.trans_type){
|
||||
set_status(STAT_WAIT);
|
||||
set_status(STAT_WAIT | cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -1760,10 +1758,11 @@ int read_file(void)
|
|||
_set_filter(selnum, 0x40, cdb.play_fad_start, lba_size-offset);
|
||||
disk_task_wakeup();
|
||||
|
||||
set_report(0x4000 | cdb.status);
|
||||
return HIRQ_EFLS;
|
||||
set_report(cdb.status);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
// 0x75 [SR]
|
||||
int abort_file(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -153,6 +153,8 @@ int get_sector(int fad, BLOCK *wblk)
|
|||
return -1;
|
||||
}
|
||||
}
|
||||
if(wblk==NULL)
|
||||
return 0;
|
||||
|
||||
if(fad>=buf_fad_start && fad<buf_fad_end){
|
||||
// 在内部缓存中找到了要play的扇区
|
||||
|
|
@ -206,20 +208,19 @@ int get_sector(int fad, BLOCK *wblk)
|
|||
/******************************************************************************/
|
||||
|
||||
|
||||
void show_pt(void)
|
||||
void show_pt(int id)
|
||||
{
|
||||
PARTITION *pt;
|
||||
FILTER *ft;
|
||||
BLOCK *bk;
|
||||
int i;
|
||||
|
||||
if(cdb.cddev_filter==0xff){
|
||||
return;
|
||||
pt = &cdb.part[id];
|
||||
SSLOG(_INFO, "Part_%d: nblks=%d\n", pt->numblocks);
|
||||
bk = pt->head;
|
||||
for(i=0; i<pt->numblocks; i++){
|
||||
SSLOG(_INFO, " %2d: size=%4d fad=%08x data=%08x\n", i, bk->size, bk->fad, bk->data);
|
||||
bk = bk->next;
|
||||
}
|
||||
ft = &cdb.filter[cdb.cddev_filter];
|
||||
pt = &cdb.part[ft->c_true];
|
||||
|
||||
SSLOG(_INFO, " : Part_%d: nblks=%d\n", ft->c_true, pt->numblocks);
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -281,6 +282,9 @@ _restart_nowait:
|
|||
set_pause_ok();
|
||||
goto _restart_wait;
|
||||
}
|
||||
|
||||
get_sector(cdb.fad, NULL);
|
||||
|
||||
if(cdb.play_fad_start==0 || cdb.play_type==0){
|
||||
SSLOG(_DTASK, "play_task: play_type=%d! play_fad_start=%08x!\n", cdb.play_type, cdb.play_fad_start);
|
||||
cdb.status = STAT_PAUSE;
|
||||
|
|
@ -291,8 +295,9 @@ _restart_nowait:
|
|||
}else{
|
||||
SSLOG(_DTASK, "\nplay_task! fad_start=%08x(lba_%d) fad_end=%08x fad=%08x type=%d free=%d\n",
|
||||
cdb.play_fad_start, cdb.play_fad_start-150, cdb.play_fad_end, cdb.fad, cdb.play_type, cdb.block_free);
|
||||
if(cdb.play_fad_start == cdb.fad){
|
||||
if(cdb.play_type==PLAYTYPE_SECTOR && cdb.play_fad_start == cdb.fad){
|
||||
if(play_delay){
|
||||
cdb.status = STAT_SEEK;
|
||||
hw_delay(play_delay);
|
||||
}
|
||||
}
|
||||
|
|
@ -329,7 +334,7 @@ _restart_nowait:
|
|||
}else
|
||||
{
|
||||
//printk("filter sector %08x...\n", cdb.fad);
|
||||
if(sector_delay){
|
||||
if(cdb.play_type==PLAYTYPE_SECTOR && sector_delay){
|
||||
hw_delay(sector_delay);
|
||||
}
|
||||
retv = filter_sector(play_track, &wblk);
|
||||
|
|
@ -341,6 +346,9 @@ _restart_nowait:
|
|||
SSLOG(_DTASK, "buffer full! wait ...\n");
|
||||
// block缓存已满, 需要等待某个事件再继续
|
||||
HIRQ = HIRQ_BFUL;
|
||||
if(cdb.play_type==PLAYTYPE_FILE){
|
||||
HIRQ = HIRQ_EFLS;
|
||||
}
|
||||
cdb.status = STAT_PAUSE;
|
||||
cdb.play_wait = 1;
|
||||
goto _restart_wait;
|
||||
|
|
|
|||
|
|
@ -62,6 +62,7 @@ void saturn_config(void);
|
|||
|
||||
int flash_update(int check);
|
||||
int fpga_update(int check);
|
||||
int flash_write_config(u8 *cfgbuf);
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
|
|
|
|||
|
|
@ -165,6 +165,15 @@ void Metal_Slug_patch(void)
|
|||
}
|
||||
|
||||
|
||||
/*********************************************************/
|
||||
//Metal_Slug A ºÏ½ðµ¯Í·1.005°æ
|
||||
void Metal_Slug_A_patch(void)
|
||||
{
|
||||
ssctrl_set(MASK_EXMEM, CS0_RAM1M);
|
||||
*(u32*)(0x06079FBC) = 0x34403440;
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************/
|
||||
// KOF96
|
||||
// 1MB RAM cart only
|
||||
|
|
@ -331,6 +340,26 @@ void xmvsf_patch(void)
|
|||
}
|
||||
|
||||
|
||||
/**********************************************************/
|
||||
// Marvel Super Heroes vs. Street Fighter (Japan)
|
||||
void mshvssf_handle1(void)
|
||||
{
|
||||
if(*(u16*)(0x600286e)== 0x2012)
|
||||
*(u16*)(0x600286e) = 0x0009;
|
||||
if(*(u16*)(0x600205A)== 0x2102)
|
||||
*(u16*)(0x600205A) = 0x0009;
|
||||
__asm volatile("jmp @%0"::"r"(0x6002000));
|
||||
__asm volatile ("nop" :: );
|
||||
}
|
||||
|
||||
void mshvssf_patch(void)
|
||||
{
|
||||
*(u8*)0x060F000B = 0x46;
|
||||
*(u8*)0x060F001D = 0x41;
|
||||
*(u32*)(0x60F0124) = (u32)mshvssf_handle1;
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************/
|
||||
// WAKUWAKU7 »ðÈÈ»ðÈÈ7 δÐÞ¸´
|
||||
void WAKU7_patch(void)
|
||||
|
|
@ -361,7 +390,7 @@ void FIGHTERS_HISTORY_patch(void)
|
|||
{
|
||||
*(u16*)0x060507C4 = 0x9;
|
||||
*(u16*)0x060507d8 = 0x9;
|
||||
SS_CTRL = (SAROO_EN | CS0_RAM1M);
|
||||
ssctrl_set(MASK_EXMEM, CS0_RAM1M);
|
||||
*(u32*)0x060500C8 = 0x34403440;
|
||||
*(u32*)0x06057000 = 0x34403440;
|
||||
*(u32*)0x0605707C = 0x34403440;
|
||||
|
|
@ -404,7 +433,8 @@ GAME_DB game_dbs[] = {
|
|||
{"T-1230G", "POCKET_FIGHTER", POCKET_FIGHTER_patch},
|
||||
{"T-1246G", "SF_ZERO3", SF_ZERO3_patch},
|
||||
|
||||
{"T-3111G", "Metal_Slug", Metal_Slug_patch},
|
||||
{"T-3111G V1.002", "Metal_Slug", Metal_Slug_patch},
|
||||
{"T-3111G V1.005", "Metal_Slug_A", Metal_Slug_A_patch},
|
||||
{"T-3108G", "KOF96", kof96_patch},
|
||||
{"T-3121G", "KOF97", kof97_patch},
|
||||
{"T-3104G", "SamuraiSp3", smrsp3_patch},
|
||||
|
|
@ -422,6 +452,7 @@ GAME_DB game_dbs[] = {
|
|||
{"T-1248G", "FINAL_FIGHT_REVENGE", FINAL_FIGHT_REVENGE_patch},
|
||||
{"T-1226G", "XMENVSSF", xmvsf_patch},
|
||||
{"T-1215G", "MARVEL_SUPER", MARVEL_SUPER_patch},
|
||||
{"T-1238G V1.000", "MSH_VS_SF", mshvssf_patch},
|
||||
{NULL,},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -421,7 +421,7 @@ int bup_dir(int dev, char *file_name, int tbsize, BUPDIR *dir)
|
|||
|
||||
printk("bup_dir(%d): %s %d\n", dev, file_name, tbsize);
|
||||
if(dev>0)
|
||||
return BUP_NON;
|
||||
return 0;
|
||||
|
||||
fnum = 0;
|
||||
while(1){
|
||||
|
|
|
|||
Loading…
Reference in a new issue