start raster scfg bit; add stencil buffer to reset

also fix a small issue that prevented compiling
This commit is contained in:
Jaklyy 2024-03-09 15:46:50 -05:00
parent a03aec13c1
commit fe683c1250
7 changed files with 24 additions and 6 deletions

View file

@ -3173,4 +3173,9 @@ void DSi::ARM7IOWrite32(u32 addr, u32 val)
return NDS::ARM7IOWrite32(addr, val);
}
bool DSi::GetSCFGRasterBit()
{
return SCFG_EXT[0] & (1<<2);
}
}

View file

@ -129,6 +129,8 @@ public:
void ARM7IOWrite16(u32 addr, u16 val) override;
void ARM7IOWrite32(u32 addr, u32 val) override;
bool GetSCFGRasterBit() override;
public:
DSi(DSiArgs&& args) noexcept;
~DSi() noexcept override;

View file

@ -2470,7 +2470,8 @@ void GPU3D::VBlank() noexcept
&& RenderFogOffset == FogOffset * 0x200
&& memcmp(RenderEdgeTable, EdgeTable, 8*2) == 0
&& memcmp(RenderFogDensityTable + 1, FogDensityTable, 32) == 0
&& memcmp(RenderToonTable, ToonTable, 32*2) == 0;
&& memcmp(RenderToonTable, ToonTable, 32*2) == 0
&& RenderRasterRev == NDS.GetSCFGRasterBit();
}
RenderDispCnt = DispCnt;
@ -2488,6 +2489,8 @@ void GPU3D::VBlank() noexcept
RenderClearAttr1 = ClearAttr1;
RenderClearAttr2 = ClearAttr2;
// CHECKME: is this actually latched?
RenderRasterRev = NDS.GetSCFGRasterBit();
}
if (FlushRequest)

View file

@ -271,6 +271,8 @@ public:
u32 RenderClearAttr1 = 0;
u32 RenderClearAttr2 = 0;
bool RenderRasterRev = false;
bool RenderFrameIdentical = false; // not part of the hardware state, don't serialize
bool AbortFrame = false;

View file

@ -121,6 +121,7 @@ void SoftRenderer::Reset(GPU& gpu)
memset(ColorBuffer, 0, BufferSize * 2 * 4);
memset(DepthBuffer, 0, BufferSize * 2 * 4);
memset(AttrBuffer, 0, BufferSize * 2 * 4);
memset(StencilBuffer, 0, 256*2); // CHECKME?
PrevIsShadowMask = false;
@ -713,7 +714,7 @@ void SoftRenderer::RenderShadowMaskScanline(const GPU3D& gpu3d, RendererPolygon*
else
fnDepthTest = DepthTest_LessThan;
if (!PrevIsShadowMask)
if (!PrevIsShadowMask && !gpu3d.RenderRasterRev) // the "Revised" Rasterizer Circuit bugs out stencil buffer clearing
memset(&StencilBuffer[256 * (y&0x1)], 0, 256);
PrevIsShadowMask = true;
@ -771,8 +772,7 @@ void SoftRenderer::RenderShadowMaskScanline(const GPU3D& gpu3d, RendererPolygon*
std::swap(wl, wr);
std::swap(zl, zr);
// CHECKME: edge fill rules for swapped opaque shadow mask polygons
if ((gpu3d.RenderDispCnt & ((1<<4)|(1<<5))) || wireframe)
if ((gpu3d.RenderDispCnt & ((1<<4)|(1<<5))) || !(polygon->Attr & (0x1F << 16)))
{
l_filledge = true;
r_filledge = true;
@ -799,8 +799,7 @@ void SoftRenderer::RenderShadowMaskScanline(const GPU3D& gpu3d, RendererPolygon*
rp->SlopeL.EdgeParams<false>(&l_edgelen, &l_edgecov);
rp->SlopeR.EdgeParams<false>(&r_edgelen, &r_edgecov);
// CHECKME: edge fill rules for unswapped opaque shadow mask polygons
if ((gpu3d.RenderDispCnt & ((1<<4)|(1<<5))) || wireframe)
if ((gpu3d.RenderDispCnt & ((1<<4)|(1<<5))) || !(polygon->Attr & (0x1F << 16)))
{
l_filledge = true;
r_filledge = true;

View file

@ -4334,4 +4334,9 @@ void NDS::ARM7IOWrite32(u32 addr, u32 val)
Log(LogLevel::Debug, "unknown ARM7 IO write32 %08X %08X %08X\n", addr, val, ARM7.R[15]);
}
bool NDS::GetSCFGRasterBit()
{
return false;
}
}

View file

@ -471,6 +471,8 @@ public: // TODO: Encapsulate the rest of these members
void SetJITArgs(std::optional<JITArgs> args) noexcept {}
#endif
virtual bool GetSCFGRasterBit();
private:
void InitTimings();
u32 SchedListMask;