hardware/liverpool: North Bridge device

This commit is contained in:
Alexandro Sanchez Bach 2021-10-26 14:44:24 +02:00
parent 2321f3bb82
commit e9bd808181
5 changed files with 243 additions and 0 deletions

1
.gitignore vendored
View file

@ -1,6 +1,7 @@
# Binaries
bin/*.exe
bin/*.dll
out/
# Dependencies
vcpkg_installed

View file

@ -0,0 +1,101 @@
/**
* Liverpool North Bridge (NB) PCI device.
*
* Copyright 2017-2021. Orbital project.
* Released under MIT license. Read LICENSE for more details.
*
* Authors:
* - Alexandro Sanchez Bach <alexandro@phi.nz>
*/
#include "liverpool_nb.h"
LiverpoolNBFnc0Device::LiverpoolNBFnc0Device(PCIBus* bus, const LiverpoolNBFnc0DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc0Device::~LiverpoolNBFnc0Device() {
}
void LiverpoolNBFnc0Device::reset() {
}
LiverpoolNBFnc1Device::LiverpoolNBFnc1Device(PCIBus* bus, const LiverpoolNBFnc1DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc1Device::~LiverpoolNBFnc1Device() {
}
void LiverpoolNBFnc1Device::reset() {
}
LiverpoolNBFnc2Device::LiverpoolNBFnc2Device(PCIBus* bus, const LiverpoolNBFnc2DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc2Device::~LiverpoolNBFnc2Device() {
}
void LiverpoolNBFnc2Device::reset() {
}
LiverpoolNBFnc3Device::LiverpoolNBFnc3Device(PCIBus* bus, const LiverpoolNBFnc3DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc3Device::~LiverpoolNBFnc3Device() {
}
void LiverpoolNBFnc3Device::reset() {
/**
* Set APU chipset version.
* Liverpool:
* - 0x00710F00 : LVP A0
* - 0x00710F10 : LVP B0
* - 0x00710F11 : LVP B1
* - 0x00710F12 : LVP B2
* - 0x00710F13 : LVP B2.1
* - 0x00710F30 : LVP+ A0
* - 0x00710F31 : LVP+ A0b
* - 0x00710F32 : LVP+ A1
* - 0x00710F40 : LVP+ B0
* - 0x00710F80 : LVP2 A0
* - 0x00710F81 : LVP2 A1
* - 0x00710FA0 : LVP2C A0
* Gladius:
* - 0x00740F00 : GL A0
* - 0x00740F01 : GL A1
* - 0x00740F10 : GL B0
* - 0x00740F11 : GL B1
* - 0x00740F12 : GL T(B2)
*/
constexpr U32 REG_NB_CPUID_3XFC = 0xFC;
(U32&)config_data[REG_NB_CPUID_3XFC] = 0x00710F13;
}
LiverpoolNBFnc4Device::LiverpoolNBFnc4Device(PCIBus* bus, const LiverpoolNBFnc4DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc4Device::~LiverpoolNBFnc4Device() {
}
void LiverpoolNBFnc4Device::reset() {
}
LiverpoolNBFnc5Device::LiverpoolNBFnc5Device(PCIBus* bus, const LiverpoolNBFnc5DeviceConfig& config)
: PCIDevice(bus, config) {
reset();
}
LiverpoolNBFnc5Device::~LiverpoolNBFnc5Device() {
}
void LiverpoolNBFnc5Device::reset() {
}

View file

@ -0,0 +1,120 @@
/**
* Liverpool North Bridge (NB) PCI device.
*
* Copyright 2017-2021. Orbital project.
* Released under MIT license. Read LICENSE for more details.
*
* Authors:
* - Alexandro Sanchez Bach <alexandro@phi.nz>
*/
#pragma once
#include <orbital/core.h>
enum {
LIVERPOOL_NB_DEV = 0x18,
LIVERPOOL_NB_FNC0 = 0,
LIVERPOOL_NB_FNC1 = 1,
LIVERPOOL_NB_FNC2 = 2,
LIVERPOOL_NB_FNC3 = 3,
LIVERPOOL_NB_FNC4 = 4,
LIVERPOOL_NB_FNC5 = 5,
};
constexpr auto LIVERPOOL_NB_FNC0_DID = static_cast<PCIDeviceId>(0x142E);
constexpr auto LIVERPOOL_NB_FNC1_DID = static_cast<PCIDeviceId>(0x142F);
constexpr auto LIVERPOOL_NB_FNC2_DID = static_cast<PCIDeviceId>(0x1430);
constexpr auto LIVERPOOL_NB_FNC3_DID = static_cast<PCIDeviceId>(0x1431);
constexpr auto LIVERPOOL_NB_FNC4_DID = static_cast<PCIDeviceId>(0x1432);
constexpr auto LIVERPOOL_NB_FNC5_DID = static_cast<PCIDeviceId>(0x1433);
struct LiverpoolNBFnc0DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc0DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC0))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC0_DID, 0x1, 0x0) {
}
};
struct LiverpoolNBFnc1DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc1DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC1))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC1_DID, 0x1, 0x0) {
}
};
struct LiverpoolNBFnc2DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc2DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC2))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC2_DID, 0x1, 0x0) {
}
};
struct LiverpoolNBFnc3DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc3DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC3))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC3_DID, 0x1, 0x0) {
}
};
struct LiverpoolNBFnc4DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc4DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC4))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC4_DID, 0x1, 0x0) {
}
};
struct LiverpoolNBFnc5DeviceConfig : PCIDeviceConfig {
LiverpoolNBFnc5DeviceConfig(PCI_DF df = PCI_DF(LIVERPOOL_NB_DEV, LIVERPOOL_NB_FNC5))
: PCIDeviceConfig(df, PCI_VENDOR_ID_AMD, LIVERPOOL_NB_FNC5_DID, 0x1, 0x0) {
}
};
class LiverpoolNBFnc0Device final : public PCIDevice {
public:
LiverpoolNBFnc0Device(PCIBus* bus, const LiverpoolNBFnc0DeviceConfig& config = {});
~LiverpoolNBFnc0Device();
// Device interface
void reset() override;
};
class LiverpoolNBFnc1Device final : public PCIDevice {
public:
LiverpoolNBFnc1Device(PCIBus* bus, const LiverpoolNBFnc1DeviceConfig& config = {});
~LiverpoolNBFnc1Device();
// Device interface
void reset() override;
};
class LiverpoolNBFnc2Device final : public PCIDevice {
public:
LiverpoolNBFnc2Device(PCIBus* bus, const LiverpoolNBFnc2DeviceConfig& config = {});
~LiverpoolNBFnc2Device();
// Device interface
void reset() override;
};
class LiverpoolNBFnc3Device final : public PCIDevice {
public:
LiverpoolNBFnc3Device(PCIBus* bus, const LiverpoolNBFnc3DeviceConfig& config = {});
~LiverpoolNBFnc3Device();
// Device interface
void reset() override;
};
class LiverpoolNBFnc4Device final : public PCIDevice {
public:
LiverpoolNBFnc4Device(PCIBus* bus, const LiverpoolNBFnc4DeviceConfig& config = {});
~LiverpoolNBFnc4Device();
// Device interface
void reset() override;
};
class LiverpoolNBFnc5Device final : public PCIDevice {
public:
LiverpoolNBFnc5Device(PCIBus* bus, const LiverpoolNBFnc5DeviceConfig& config = {});
~LiverpoolNBFnc5Device();
// Device interface
void reset() override;
};

View file

@ -20,6 +20,7 @@
#include <orbital/hardware/liverpool/liverpool_gc.h>
#include <orbital/hardware/liverpool/liverpool_hdac.h>
#include <orbital/hardware/liverpool/liverpool_iommu.h>
#include <orbital/hardware/liverpool/liverpool_nb.h>
#include <orbital/hardware/liverpool/liverpool_rc.h>
#include <orbital/hardware/liverpool/liverpool_rp.h>
#include <orbital/hardware/liverpool_pci.h>
@ -70,6 +71,13 @@ PS4Machine::PS4Machine(const PS4MachineConfig& config) : Machine(config) {
lvp_iommu = new LiverpoolIOMMUDevice(lvp_bus);
lvp_rp = new LiverpoolRPDevice(lvp_bus);
lvp_fnc0 = new LiverpoolNBFnc0Device(lvp_bus);
lvp_fnc1 = new LiverpoolNBFnc1Device(lvp_bus);
lvp_fnc2 = new LiverpoolNBFnc2Device(lvp_bus);
lvp_fnc3 = new LiverpoolNBFnc3Device(lvp_bus);
lvp_fnc4 = new LiverpoolNBFnc4Device(lvp_bus);
lvp_fnc5 = new LiverpoolNBFnc5Device(lvp_bus);
// Initialize Aeolia
aeolia_acpi = new AeoliaACPIDevice(lvp_bus);
aeolia_gbe = new AeoliaGBEDevice(lvp_bus);

View file

@ -29,6 +29,12 @@ class LiverpoolGCDevice;
class LiverpoolHDACDevice;
class LiverpoolIOMMUDevice;
class LiverpoolRPDevice;
class LiverpoolNBFnc0Device;
class LiverpoolNBFnc1Device;
class LiverpoolNBFnc2Device;
class LiverpoolNBFnc3Device;
class LiverpoolNBFnc4Device;
class LiverpoolNBFnc5Device;
struct PS4MachineConfig : MachineConfig {
@ -84,6 +90,13 @@ private:
LiverpoolIOMMUDevice* lvp_iommu;
LiverpoolRPDevice* lvp_rp;
LiverpoolNBFnc0Device* lvp_fnc0;
LiverpoolNBFnc1Device* lvp_fnc1;
LiverpoolNBFnc2Device* lvp_fnc2;
LiverpoolNBFnc3Device* lvp_fnc3;
LiverpoolNBFnc4Device* lvp_fnc4;
LiverpoolNBFnc5Device* lvp_fnc5;
// Aeolia
AeoliaACPIDevice* aeolia_acpi;
AeoliaGBEDevice* aeolia_gbe;