From 6483bdb28538a4a099b3cf645eae97cc19df2f84 Mon Sep 17 00:00:00 2001 From: hch12907 Date: Mon, 10 Sep 2018 22:52:13 +0800 Subject: [PATCH] Add CPI to the VU instructions --- .../src/Resources/Ee/Vpu/Vu/VuInstruction.cpp | 351 ++++++++++-------- 1 file changed, 186 insertions(+), 165 deletions(-) diff --git a/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.cpp b/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.cpp index 30e8133f..90f89ef0 100644 --- a/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.cpp +++ b/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.cpp @@ -2,171 +2,192 @@ MipsInstructionInfo VU_INSTRUCTION_TABLE[Constants::EE::VPU::VU::NUMBER_VU_INSTRUCTIONS] = { - // TODO: determine the proper cycles per instruction - {"LQ", 109, 1}, - {"SQ", 112, 1}, - {"ILW", 115, 1}, - {"ISW", 116, 1}, - {"IADDIU", 100, 1}, - {"ISUBIU", 104, 1}, - {"FCEQ", 132, 1}, - {"FCSET", 134, 1}, - {"FCAND", 131, 1}, - {"FCOR", 133, 1}, - {"FSEQ", 125, 1}, - {"FSSET", 127, 1}, - {"FSAND", 124, 1}, - {"FSOR", 126, 1}, - {"FMEQ", 129, 1}, - {"FMAND", 128, 1}, - {"FMOR", 130, 1}, - {"FCGET", 135, 1}, - {"B", 142, 1}, - {"BAL", 143, 1}, - {"JR", 144, 1}, - {"JALR", 145, 1}, - {"IBEQ", 136, 1}, - {"IBNE", 141, 1}, - {"IBLTZ", 140, 1}, - {"IBGTZ", 138, 1}, - {"IBLEZ", 139, 1}, - {"IBGEZ", 137, 1}, - {"IADD", 98, 1}, - {"ISUB", 103, 1}, - {"IADDI", 99, 1}, - {"IAND", 101, 1}, - {"IOR", 102, 1}, - {"MOVE", 105, 1}, - {"LQI", 111, 1}, - {"DIV", 95, 1}, - {"MTIR", 107, 1}, - {"RNEXT", 121, 1}, - {"MFP", 146, 1}, - {"XTOP", 162, 1}, - {"XGKICK", 161, 1}, - {"ESADD", 148, 1}, - {"EATANxy", 152, 1}, - {"ESQRT", 156, 1}, - {"ESIN", 158, 1}, - {"MR32", 108, 1}, - {"SQI", 114, 1}, - {"SQRT", 96, 1}, - {"MFIR", 106, 1}, - {"RGET", 120, 1}, - {"XITOP", 163, 1}, - {"ERSADD", 149, 1}, - {"EATANxz", 153, 1}, - {"ERSQRT", 157, 1}, - {"EATAN", 159, 1}, - {"LQD", 110, 1}, - {"RSQRT", 97, 1}, - {"ILWR", 117, 1}, - {"RINIT", 119, 1}, - {"ELENG", 150, 1}, - {"ESUM", 154, 1}, - {"ERCPR", 155, 1}, - {"EEXP", 160, 1}, - {"SQD", 113, 1}, - {"WAITQ", 123, 1}, - {"ISWR", 118, 1}, - {"RXOR", 122, 1}, - {"ERLENG", 151, 1}, - {"WAITP", 147, 1}, - {"ADDbc_0", 4, 1}, - {"ADDbc_1", 5, 1}, - {"ADDbc_2", 6, 1}, - {"ADDbc_3", 7, 1}, - {"SUBbc_0", 18, 1}, - {"SUBbc_1", 19, 1}, - {"SUBbc_2", 20, 1}, - {"SUBbc_3", 21, 1}, - {"MADDbc_0", 46, 1}, - {"MADDbc_1", 47, 1}, - {"MADDbc_2", 48, 1}, - {"MADDbc_3", 49, 1}, - {"MSUBbc_0", 60, 1}, - {"MSUBbc_1", 61, 1}, - {"MSUBbc_2", 62, 1}, - {"MSUBbc_3", 63, 1}, - {"MAXbc_0", 73, 1}, - {"MAXbc_1", 74, 1}, - {"MAXbc_2", 75, 1}, - {"MAXbc_3", 76, 1}, - {"MINIbc_0", 79, 1}, - {"MINIbc_1", 80, 1}, - {"MINIbc_2", 81, 1}, - {"MINIbc_3", 82, 1}, - {"MULbc_0", 32, 1}, - {"MULbc_1", 33, 1}, - {"MULbc_2", 34, 1}, - {"MULbc_3", 35, 1}, - {"MULq", 31, 1}, - {"MAXi", 72, 1}, - {"MULi", 30, 1}, - {"MINIi", 78, 1}, - {"ADDq", 3, 1}, - {"MADDq", 45, 1}, - {"ADDi", 2, 1}, - {"MADDi", 44, 1}, - {"SUBq", 17, 1}, - {"MSUBq", 59, 1}, - {"SUBi", 16, 1}, - {"MSUBi", 58, 1}, - {"ADD", 1, 1}, - {"MADD", 43, 1}, - {"MUL", 29, 1}, - {"MAX", 71, 1}, - {"SUB", 15, 1}, - {"MSUB", 57, 1}, - {"OPMSUB", 84, 1}, - {"MINI", 77, 1}, - {"ADDAbc_0", 11, 1}, - {"SUBAbc_0", 25, 1}, - {"MADDAbc_0", 53, 1}, - {"MSUBAbc_0", 67, 1}, - {"ITOF0", 90, 1}, - {"FTOI0", 86, 1}, - {"MULAbc_0", 39, 1}, - {"MULAq", 38, 1}, - {"ADDAq", 10, 1}, - {"SUBAq", 24, 1}, - {"ADDA", 8, 1}, - {"SUBA", 22, 1}, - {"ADDAbc_1", 12, 1}, - {"SUBAbc_1", 26, 1}, - {"MADDAbc_1", 54, 1}, - {"MSUBAbc_1", 68, 1}, - {"ITOF4", 91, 1}, - {"FTOI4", 87, 1}, - {"MULAbc_1", 40, 1}, - {"ABS", 0, 1}, - {"MADDAq", 52, 1}, - {"MSUBAq", 66, 1}, - {"MADDA", 50, 1}, - {"MSUBA", 64, 1}, - {"ADDAbc_2", 13, 1}, - {"SUBAbc_2", 27, 1}, - {"MADDAbc_2", 55, 1}, - {"MSUBAbc_2", 69, 1}, - {"ITOF12", 92, 1}, - {"FTOI12", 88, 1}, - {"MULAbc_2", 41, 1}, - {"MULAi", 37, 1}, - {"ADDAi", 9, 1}, - {"SUBAi", 23, 1}, - {"MULA", 36, 1}, - {"OPMULA", 83, 1}, - {"ADDAbc_3", 14, 1}, - {"SUBAbc_3", 28, 1}, - {"MADDAbc_3", 56, 1}, - {"MSUBAbc_3", 70, 1}, - {"ITOF15", 93, 1}, - {"FTOI15", 89, 1}, - {"MULAbc_3", 42, 1}, - {"CLIP", 94, 1}, - {"MADDAi", 51, 1}, - {"MSUBAi", 65, 1}, - {"NOP", 85, 1}}; + // Most VU instructions (Upper Instructions, Flags, Integer Store/Load...) + // follow the basic FMAC pipeline, which has 3 execution stages. + // Stalls on data hazard (when the same field of the same register is accessed + // by following instructions while the first instruction is still running). + + // Some instructions follow the FDIV pipeline, which has a significantly + // longer execution time (up to 13 cycles). + // Stalls on resource hazard (when two instructions attempt to use the FDIV + // unit at the same time). There is no data hazard - the original Q register + // (containing results from last FDIV operation) is used instead. + + // Instructions prefixed with "E" follow EFU pipeline, which is similar to + // FDIV pipeline, except that EFU is freed when it reaches the write-back + // stage, whereas FDIV is freed when the register is actually written. + + // Instructions prefixed with "I" utilizes the IALU unit. While calculation + // is done in 1 cycle, there are 2 dummy stages (made to follow the FMACs), + // which shows up in macro mode (normally the results are bypassed) + + // Lower Instructions + {"LQ", 109, 6}, + {"SQ", 112, 6}, + {"ILW", 115, 6}, + {"ISW", 116, 6}, + {"IADDIU", 100, 6}, + {"ISUBIU", 104, 6}, + {"FCEQ", 132, 6}, + {"FCSET", 134, 6}, + {"FCAND", 131, 6}, + {"FCOR", 133, 6}, + {"FSEQ", 125, 6}, + {"FSSET", 127, 6}, + {"FSAND", 124, 6}, + {"FSOR", 126, 6}, + {"FMEQ", 129, 6}, + {"FMAND", 128, 6}, + {"FMOR", 130, 6}, + {"FCGET", 135, 6}, + {"B", 142, 4}, + {"BAL", 143, 4}, + {"JR", 144, 4}, + {"JALR", 145, 4}, + {"IBEQ", 136, 4}, + {"IBNE", 141, 4}, + {"IBLTZ", 140, 4}, + {"IBGTZ", 138, 4}, + {"IBLEZ", 139, 4}, + {"IBGEZ", 137, 4}, + {"IADD", 98, 6}, + {"ISUB", 103, 6}, + {"IADDI", 99, 6}, + {"IAND", 101, 6}, + {"IOR", 102, 6}, + {"MOVE", 105, 6}, + {"LQI", 111, 6}, + {"DIV", 95, 9}, + {"MTIR", 107, 6}, + {"RNEXT", 121, 6}, + {"MFP", 146, 6}, + {"XTOP", 162, 6}, + {"XGKICK", 161, 6}, + {"ESADD", 148, 13}, + {"EATANxy", 152, 56}, + {"ESQRT", 156, 14}, + {"ESIN", 158, 31}, + {"MR32", 108, 6}, + {"SQI", 114, 6}, + {"SQRT", 96, 9}, + {"MFIR", 106, 6}, + {"RGET", 120, 6}, + {"XITOP", 163, 6}, + {"ERSADD", 149, 20}, + {"EATANxz", 153, 56}, + {"ERSQRT", 157, 20}, + {"EATAN", 159, 56}, + {"LQD", 110, 6}, + {"RSQRT", 97, 15}, + {"ILWR", 117, 6}, + {"RINIT", 119, 6}, + {"ELENG", 150, 20}, + {"ESUM", 154, 14}, + {"ERCPR", 155, 14}, + {"EEXP", 160, 46}, + {"SQD", 113, 6}, + {"WAITQ", 123, 6}, + {"ISWR", 118, 6}, + {"RXOR", 122, 6}, + {"ERLENG", 151, 26}, + {"WAITP", 147, 6}, + + // Upper Instructions + {"ADDbc_0", 4, 6}, + {"ADDbc_1", 5, 6}, + {"ADDbc_2", 6, 6}, + {"ADDbc_3", 7, 6}, + {"SUBbc_0", 18, 6}, + {"SUBbc_1", 19, 6}, + {"SUBbc_2", 20, 6}, + {"SUBbc_3", 21, 6}, + {"MADDbc_0", 46, 6}, + {"MADDbc_1", 47, 6}, + {"MADDbc_2", 48, 6}, + {"MADDbc_3", 49, 6}, + {"MSUBbc_0", 60, 6}, + {"MSUBbc_1", 61, 6}, + {"MSUBbc_2", 62, 6}, + {"MSUBbc_3", 63, 6}, + {"MAXbc_0", 73, 6}, + {"MAXbc_1", 74, 6}, + {"MAXbc_2", 75, 6}, + {"MAXbc_3", 76, 6}, + {"MINIbc_0", 79, 6}, + {"MINIbc_1", 80, 6}, + {"MINIbc_2", 81, 6}, + {"MINIbc_3", 82, 6}, + {"MULbc_0", 32, 6}, + {"MULbc_1", 33, 6}, + {"MULbc_2", 34, 6}, + {"MULbc_3", 35, 6}, + {"MULq", 31, 6}, + {"MAXi", 72, 6}, + {"MULi", 30, 6}, + {"MINIi", 78, 6}, + {"ADDq", 3, 6}, + {"MADDq", 45, 6}, + {"ADDi", 2, 6}, + {"MADDi", 44, 6}, + {"SUBq", 17, 6}, + {"MSUBq", 59, 6}, + {"SUBi", 16, 6}, + {"MSUBi", 58, 6}, + {"ADD", 1, 6}, + {"MADD", 43, 6}, + {"MUL", 29, 6}, + {"MAX", 71, 6}, + {"SUB", 15, 6}, + {"MSUB", 57, 6}, + {"OPMSUB", 84, 6}, + {"MINI", 77, 6}, + {"ADDAbc_0", 11, 6}, + {"SUBAbc_0", 25, 6}, + {"MADDAbc_0", 53, 6}, + {"MSUBAbc_0", 67, 6}, + {"ITOF0", 90, 6}, + {"FTOI0", 86, 6}, + {"MULAbc_0", 39, 6}, + {"MULAq", 38, 6}, + {"ADDAq", 10, 6}, + {"SUBAq", 24, 6}, + {"ADDA", 8, 6}, + {"SUBA", 22, 6}, + {"ADDAbc_1", 12, 6}, + {"SUBAbc_1", 26, 6}, + {"MADDAbc_1", 54, 6}, + {"MSUBAbc_1", 68, 6}, + {"ITOF4", 91, 6}, + {"FTOI4", 87, 6}, + {"MULAbc_1", 40, 6}, + {"ABS", 0, 6}, + {"MADDAq", 52, 6}, + {"MSUBAq", 66, 6}, + {"MADDA", 50, 6}, + {"MSUBA", 64, 6}, + {"ADDAbc_2", 13, 6}, + {"SUBAbc_2", 27, 6}, + {"MADDAbc_2", 55, 6}, + {"MSUBAbc_2", 69, 6}, + {"ITOF12", 92, 6}, + {"FTOI12", 88, 6}, + {"MULAbc_2", 41, 6}, + {"MULAi", 37, 6}, + {"ADDAi", 9, 6}, + {"SUBAi", 23, 6}, + {"MULA", 36, 6}, + {"OPMULA", 83, 6}, + {"ADDAbc_3", 14, 6}, + {"SUBAbc_3", 28, 6}, + {"MADDAbc_3", 56, 6}, + {"MSUBAbc_3", 70, 6}, + {"ITOF15", 93, 6}, + {"FTOI15", 89, 6}, + {"MULAbc_3", 42, 6}, + {"CLIP", 94, 6}, + {"MADDAi", 51, 6}, + {"MSUBAi", 65, 6}, + {"NOP", 85, 6}}; MipsInstructionInfo VuInstruction::lower_lookup() const {