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84 lines
2.3 KiB
C++
84 lines
2.3 KiB
C++
#pragma once
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#include <cereal/cereal.hpp>
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#include "Common/Types/Bus/ByteBus.hpp"
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#include "Common/Types/Memory/ArrayByteMemory.hpp"
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#include "Common/Types/Primitive.hpp"
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#include "Common/Types/Register/SizedWordRegister.hpp"
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#include "Resources/Ee/Core/REeCore.hpp"
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#include "Resources/Ee/Dmac/REeDmac.hpp"
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#include "Resources/Ee/EeRegisters.hpp"
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#include "Resources/Ee/Gif/RGif.hpp"
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#include "Resources/Ee/Intc/REeIntc.hpp"
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#include "Resources/Ee/Ipu/RIpu.hpp"
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#include "Resources/Ee/Timers/REeTimers.hpp"
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#include "Resources/Ee/Vpu/RVpu.hpp"
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/// EE structure.
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/// See page 22 of the EE Overview Manual, and the items within the EE Users Manual.
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class REe
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{
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public:
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REe();
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/// EE Core resources.
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REeCore core;
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/// DMAC resources.
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REeDmac dmac;
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/// INTC resources.
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REeIntc intc;
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/// Timers resources.
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REeTimers timers;
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/// IPU resources.
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RIpu ipu;
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/// GIF resources.
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RGif gif;
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/// VPU resources.
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RVpu vpu;
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/// EE bus space.
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ByteBus<uptr> bus;
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/// Main Memory (32MB).
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ArrayByteMemory main_memory;
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/// Misc. EE memory/registers, defined on page 21 onwards of the EE Users Manual.
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/// Other resources come from PCSX2.
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ArrayByteMemory unknown_1a000000; // Undocumented memory/register @ 0x1A000000 -> 0x1A00FFFF.
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EeRegister_Sio memory_sio; // Some information can be found in the Toshiba Tx79 architecture manual (similar to the EE).
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SizedWordRegister register_f400;
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ArrayByteMemory memory_f410; // Needs to be constant value (by BIOS).
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SizedWordRegister register_f420;
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EeRegister_Mch memory_mch; // No documentation (except for name)! From old PCSX2. Needed by the BIOS for RDRAM initialisation.
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ArrayByteMemory memory_f450;
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public:
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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CEREAL_NVP(core),
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CEREAL_NVP(dmac),
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CEREAL_NVP(intc),
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CEREAL_NVP(timers),
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CEREAL_NVP(ipu),
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CEREAL_NVP(gif),
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CEREAL_NVP(vpu),
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CEREAL_NVP(main_memory),
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CEREAL_NVP(unknown_1a000000),
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CEREAL_NVP(memory_sio),
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CEREAL_NVP(register_f400),
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CEREAL_NVP(memory_f410),
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CEREAL_NVP(register_f420),
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CEREAL_NVP(memory_mch),
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CEREAL_NVP(memory_f450)
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);
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}
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}; |