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https://github.com/hch12907/orbum.git
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72 lines
2.8 KiB
C++
72 lines
2.8 KiB
C++
#pragma once
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#include <cereal/cereal.hpp>
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#include "Common/Constants.hpp"
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#include "Common/Types/Register/SizedWordRegister.hpp"
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#include "Resources/Iop/Dmac/IopDmacChannelRegisters.hpp"
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#include "Resources/Iop/Dmac/IopDmacChannels.hpp"
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#include "Resources/Iop/Dmac/IopDmacRegisters.hpp"
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/// IOP DMAC resources.
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/// See the no$psx docs and wisi and SP193's DMA docs for information.
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class RIopDmac
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{
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public:
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RIopDmac();
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/// DMAC Common Registers.
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/// Wrappers are provided for the PCR and ICR registers, to appear as one.
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IopDmacRegister_Pcr0 pcr0;
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IopDmacRegister_Icr0 icr0;
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IopDmacRegister_Pcr1 pcr1;
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IopDmacRegister_Icr1 icr1;
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IopDmacRegister_Pcrw pcrw;
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IopDmacRegister_Icrw icrw;
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SizedWordRegister gctrl;
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/// DMAC Channels.
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_tomdec; // CH 0
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_frommdec; // CH 1
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr_Sif2> channel_sif2; // CH 2 bidirectional w/ EE
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_cdvd; // CH 3
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IopDmacChannel_Tadr<IopDmacChannelRegister_Chcr> channel_spu2c0; // CH 4
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_pio; // CH 5
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_otclear; // CH 6
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_spu2c1; // CH 7
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_dev9; // CH 8
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IopDmacChannel_Tadr<IopDmacChannelRegister_Chcr_Sif0> channel_sif0; // CH 9 to EE
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr_Sif1> channel_sif1; // CH 10 from EE
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_tosio2; // CH 11
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IopDmacChannel_Base<IopDmacChannelRegister_Chcr> channel_fromsio2; // CH 12
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/// IOP DMA channel abstrations.
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/// There are 14 channels in total (to make it even), with the last one being undefined.
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IopDmacChannel channels[Constants::IOP::DMAC::NUMBER_DMAC_CHANNELS - 1];
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public:
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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CEREAL_NVP(pcr0),
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CEREAL_NVP(icr0),
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CEREAL_NVP(pcr1),
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CEREAL_NVP(icr1),
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CEREAL_NVP(gctrl),
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CEREAL_NVP(channel_tomdec),
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CEREAL_NVP(channel_frommdec),
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CEREAL_NVP(channel_sif2),
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CEREAL_NVP(channel_cdvd),
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CEREAL_NVP(channel_spu2c0),
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CEREAL_NVP(channel_pio),
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CEREAL_NVP(channel_otclear),
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CEREAL_NVP(channel_spu2c1),
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CEREAL_NVP(channel_dev9),
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CEREAL_NVP(channel_sif0),
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CEREAL_NVP(channel_sif1),
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CEREAL_NVP(channel_tosio2),
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CEREAL_NVP(channel_fromsio2)
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);
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}
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}; |