mirror of
https://github.com/hch12907/orbum.git
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138 lines
5.2 KiB
C++
138 lines
5.2 KiB
C++
#pragma once
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#include <cstddef>
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#include <cereal/cereal.hpp>
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#include <cereal/types/polymorphic.hpp>
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#include "Common/Types/Bitfield.hpp"
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#include "Common/Types/Register/SizedHwordRegister.hpp"
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#include "Common/Types/ScopeLock.hpp"
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/// Used as a multipurpose register for registers of the same layout.
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class Spu2CoreRegister_Vol : public SizedHwordRegister
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{
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public:
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static constexpr Bitfield CONSTVALUE = Bitfield(0, 15);
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static constexpr Bitfield CONSTTOGGLE = Bitfield(15, 1);
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static constexpr Bitfield LINEXPMODE = Bitfield(13, 2);
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static constexpr Bitfield X = Bitfield(12, 1);
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static constexpr Bitfield LINEXPVALUE = Bitfield(0, 7);
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};
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/// Used as a multipurpose register for registers of the same layout.
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class Spu2CoreRegister_Chan0 : public SizedHwordRegister
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{
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public:
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static constexpr Bitfield V0 = Bitfield(0, 1);
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static constexpr Bitfield V1 = Bitfield(1, 1);
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static constexpr Bitfield V2 = Bitfield(2, 1);
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static constexpr Bitfield V3 = Bitfield(3, 1);
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static constexpr Bitfield V4 = Bitfield(4, 1);
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static constexpr Bitfield V5 = Bitfield(5, 1);
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static constexpr Bitfield V6 = Bitfield(6, 1);
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static constexpr Bitfield V7 = Bitfield(7, 1);
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static constexpr Bitfield V8 = Bitfield(8, 1);
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static constexpr Bitfield V9 = Bitfield(9, 1);
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static constexpr Bitfield V10 = Bitfield(10, 1);
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static constexpr Bitfield V11 = Bitfield(11, 1);
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static constexpr Bitfield V12 = Bitfield(12, 1);
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static constexpr Bitfield V13 = Bitfield(13, 1);
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static constexpr Bitfield V14 = Bitfield(14, 1);
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static constexpr Bitfield V15 = Bitfield(15, 1);
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};
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/// Used as a multipurpose register for registers of the same layout.
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class Spu2CoreRegister_Chan1 : public SizedHwordRegister
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{
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public:
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static constexpr Bitfield V16 = Bitfield(0, 1);
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static constexpr Bitfield V17 = Bitfield(1, 1);
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static constexpr Bitfield V18 = Bitfield(2, 1);
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static constexpr Bitfield V19 = Bitfield(3, 1);
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static constexpr Bitfield V20 = Bitfield(4, 1);
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static constexpr Bitfield V21 = Bitfield(5, 1);
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static constexpr Bitfield V22 = Bitfield(6, 1);
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static constexpr Bitfield V23 = Bitfield(7, 1);
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};
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class Spu2CoreRegister_Mmix : public SizedHwordRegister
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{
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public:
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static constexpr Bitfield SINER = Bitfield(0, 1);
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static constexpr Bitfield SINEL = Bitfield(1, 1);
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static constexpr Bitfield SINR = Bitfield(2, 1);
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static constexpr Bitfield SINL = Bitfield(3, 1);
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static constexpr Bitfield MINER = Bitfield(4, 1);
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static constexpr Bitfield MINEL = Bitfield(5, 1);
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static constexpr Bitfield MINR = Bitfield(6, 1);
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static constexpr Bitfield MINL = Bitfield(7, 1);
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static constexpr Bitfield MSNDER = Bitfield(8, 1);
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static constexpr Bitfield MSNDEL = Bitfield(9, 1);
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static constexpr Bitfield MSNDR = Bitfield(10, 1);
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static constexpr Bitfield MSNDL = Bitfield(11, 1);
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};
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/// The SPU2 Core "ATTR" (attributes) register.
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/// Contains the DMA transfer state parameters, see below for information.
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/// Needs to be scope locked by the SPU2 controller.
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class Spu2CoreRegister_Attr : public SizedHwordRegister, public ScopeLock
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{
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public:
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static constexpr Bitfield DMABITS = Bitfield(1, 3);
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static constexpr Bitfield DMAMODE = Bitfield(4, 2);
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static constexpr Bitfield IRQENABLE = Bitfield(6, 1);
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static constexpr Bitfield FXENABLE = Bitfield(7, 1);
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static constexpr Bitfield NOISECLOCK = Bitfield(8, 6);
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static constexpr Bitfield MUTE = Bitfield(14, 1);
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static constexpr Bitfield COREENABLE = Bitfield(15, 1);
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Spu2CoreRegister_Attr();
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/// When this register is written to, resets the DMA transfer state.
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/// Scope locked for the entire duration.
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void byte_bus_write_uhword(const BusContext context, const usize offset, const uhword value) override;
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/// Current auto/manual DMA transfer count state, in terms of hwords.
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/// Reset upon the register being written to.
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size_t dma_offset;
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public:
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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cereal::base_class<SizedHwordRegister>(this),
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CEREAL_NVP(dma_offset)
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);
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}
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};
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/// SPU2 Core STATX register.
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/// Lots of good info can be found by looking at where the IOP BIOS SPU2 debug
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/// strings are used. BIOS will detect the SPU2 has timed out if many of these
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/// bits are not set correctly, which it tries for 256 (0x100) / 3841 (0xF01)
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/// times depending on the bit.
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class Spu2CoreRegister_Statx : public SizedHwordRegister
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{
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public:
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static constexpr Bitfield UNKNOWN4 = Bitfield(4, 2); // Unknown, referenced from BIOS.
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static constexpr Bitfield DREQ = Bitfield(7, 1); // Request for more data (confirmed with BIOS).
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static constexpr Bitfield WRDY_M = Bitfield(10, 1); // (write?) ready flag? BIOS waits for this to be 0, otherwise it says SPU2 has timed out.
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};
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/// SPU2 Core ADMAS register.
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/// Some vague references in the SPU2 overview manual, not much info overall.
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class Spu2CoreRegister_Admas : public SizedHwordRegister
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{
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public:
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Spu2CoreRegister_Admas();
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/// Sets the ADMA running status (magic values).
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void set_adma_running(const bool running);
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/// Returns if ADMA is enabled for the core_id set.
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bool is_adma_enabled();
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const int* core_id;
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}; |