mirror of
https://github.com/hch12907/orbum.git
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333 lines
13 KiB
C++
333 lines
13 KiB
C++
#pragma once
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#include "Common/Types/Primitive.hpp"
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/// Constants used throughout the PS2 core.
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/// Some prefix definitions (others are self-explanatory):
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/// PADDRESS = Physical base address.
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/// VADDRESS = Virtual base address.
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/// OADDRESS = Offset from physical/virtual address.
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/// SIZE = Size in bytes.
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/// CLK_SPEED = Speed in Hz.
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/// REFRESH_RATE = Speed in Hz.
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struct Constants
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{
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static constexpr size_t SIZE_512MB = 0x20000000;
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static constexpr size_t SIZE_32MB = 0x2000000;
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static constexpr size_t SIZE_4MB = 0x400000;
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static constexpr size_t SIZE_2MB = 0x200000;
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static constexpr size_t SIZE_512KB = 0x80000;
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static constexpr size_t SIZE_256KB = 0x40000;
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static constexpr size_t SIZE_64KB = 0x10000;
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static constexpr size_t SIZE_32KB = 0x8000;
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static constexpr size_t SIZE_16KB = 0x4000;
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static constexpr size_t SIZE_8KB = 0x2000;
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static constexpr size_t SIZE_4KB = 0x1000;
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static constexpr size_t SIZE_1KB = 0x400;
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static constexpr size_t SIZE_16B = 0x10;
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static constexpr size_t SIZE_4B = 0x4;
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static constexpr uword MASK_16KB = 0x00003FFF;
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struct MIPS
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{
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static constexpr size_t SIZE_MIPS_INSTRUCTION = 0x4;
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struct MMU
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{
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static constexpr uptr VADDRESS_USER_UPPER_BOUND = 0x7FFFFFFF; // Memory segment 'useg'.
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static constexpr uptr VADDRESS_USER_LOWER_BOUND = 0x00000000;
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static constexpr uptr VADDRESS_SUPERVISOR_UPPER_BOUND_1 = 0x7FFFFFFF; // Memory segment 'suseg'.
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static constexpr uptr VADDRESS_SUPERVISOR_LOWER_BOUND_1 = 0x00000000;
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static constexpr uptr VADDRESS_SUPERVISOR_UPPER_BOUND_2 = 0xDFFFFFFF; // Memory segment 'sseg'.
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static constexpr uptr VADDRESS_SUPERVISOR_LOWER_BOUND_2 = 0xC0000000;
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static constexpr uptr VADDRESS_KERNEL_UPPER_BOUND_1 = 0x7FFFFFFF; // Memory segment 'kuseg'.
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static constexpr uptr VADDRESS_KERNEL_LOWER_BOUND_1 = 0x00000000;
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static constexpr uptr VADDRESS_KERNEL_UPPER_BOUND_2 = 0x9FFFFFFF; // Memory segment 'kseg0'.
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static constexpr uptr VADDRESS_KERNEL_LOWER_BOUND_2 = 0x80000000;
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static constexpr uptr VADDRESS_KERNEL_UPPER_BOUND_3 = 0xBFFFFFFF; // Memory segment 'kseg1'.
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static constexpr uptr VADDRESS_KERNEL_LOWER_BOUND_3 = 0xA0000000;
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static constexpr uptr VADDRESS_KERNEL_UPPER_BOUND_4 = 0xDFFFFFFF; // Memory segment 'ksseg'.
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static constexpr uptr VADDRESS_KERNEL_LOWER_BOUND_4 = 0xC0000000;
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static constexpr uptr VADDRESS_KERNEL_UPPER_BOUND_5 = 0xFFFFFFFF; // Memory segment 'kseg3'.
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static constexpr uptr VADDRESS_KERNEL_LOWER_BOUND_5 = 0xE0000000;
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};
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struct Exceptions
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{
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// Split into the MIPS COP0.PRId.Imp values. These values are set according to the MIPS ISA, not Sony (REV is for vendors, such as Sony, to set).
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struct Imp0
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{
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// Used by the IOP (R3000).
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// Taken from PSX docs, plus PCSX2 source code (R3000A.cpp).
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static constexpr uptr VADDRESS_EXCEPTION_BASE_A0 = 0x80000000;
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static constexpr uptr VADDRESS_EXCEPTION_BASE_A1 = 0xBFC00100;
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static constexpr uptr VADDRESS_EXCEPTION_BASE_V_RESET_NMI = 0xBFC00000;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_TLB_REFILL = 0x00000000;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_COMMON = 0x00000080;
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};
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struct Imp46
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{
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// Used by the EE Core (R5900).
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// See EE Core Users Manual page 90. A0 = Address 0, A1 = Address 1.
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static constexpr uptr VADDRESS_EXCEPTION_BASE_A0 = 0x80000000;
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static constexpr uptr VADDRESS_EXCEPTION_BASE_A1 = 0xBFC00200;
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static constexpr uptr VADDRESS_EXCEPTION_BASE_V_RESET_NMI = 0xBFC00000;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_TLB_REFILL = 0x00000000;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_COUNTER = 0x00000080;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_DEBUG = 0x00000100;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_COMMON = 0x00000180;
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static constexpr uptr OADDRESS_EXCEPTION_VECTOR_V_INTERRUPT = 0x00000200;
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};
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};
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};
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struct EE
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{
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struct EECore
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{
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struct ScratchpadMemory
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{
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static constexpr size_t SIZE_SCRATCHPAD_MEMORY = SIZE_16KB;
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};
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struct R5900
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{
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static constexpr int NUMBER_GP_REGISTERS = 32;
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static constexpr int NUMBER_SYSCALLS = 256; // TODO: get real value.
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static constexpr int NUMBER_EXCEPTIONS = 20;
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};
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struct COP0
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{
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static constexpr int NUMBER_REGISTERS = 32;
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static constexpr int NUMBER_PCR_REGISTERS = 2;
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};
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struct FPU
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{
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static constexpr int NUMBER_REGISTERS = 32;
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// FPU Constants Fmax (positive) and Fmax (negative), used as the upper and lower bounds of a float value (instead of plus and minus infinity?).
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static constexpr uword FMAX_POS = 0x7F7FFFFF; // Sign bit = 0 -> positive.
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static constexpr uword FMAX_NEG = 0xFF7FFFFF; // Sign bit = 1 -> negative.
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// FPU Constants +/- zero.
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static constexpr uword ZERO_POS = 0x00000000; // Sign bit = 0 -> positive.
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static constexpr uword ZERO_NEG = 0x80000000; // Sign bit = 1 -> negative.
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};
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struct MMU
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{
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// Page mask sizes, used within a TLB MASK field. See EE Core Users Manual page 67.
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static constexpr uword MASK_PAGE_SIZE_4KB = 0;
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static constexpr uword MASK_PAGE_SIZE_16KB = 3;
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static constexpr uword MASK_PAGE_SIZE_64KB = 15;
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static constexpr uword MASK_PAGE_SIZE_256KB = 63;
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static constexpr uword MASK_PAGE_SIZE_1MB = 255;
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static constexpr uword MASK_PAGE_SIZE_4MB = 1023;
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static constexpr uword MASK_PAGE_SIZE_16MB = 4095;
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static constexpr int NUMBER_TLB_ENTRIES = 48;
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static constexpr uword MASK_VPN2_FIELD_16MB = 0x0007F000;
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};
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static constexpr int NUMBER_INSTRUCTIONS = 388;
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static constexpr double EECORE_CLK_SPEED = 294912000.0; // 294.912 MHz.
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};
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struct Timers
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{
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static constexpr int NUMBER_TIMERS = 4;
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};
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struct DMAC
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{
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static constexpr int NUMBER_DMAC_CHANNELS = 10;
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static constexpr int NUMBER_CHAIN_INSTRUCTIONS = 8;
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};
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struct INTC
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{
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static constexpr int NUMBER_IRQ_LINES = 15;
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};
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struct MainMemory
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{
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static constexpr size_t SIZE_MAIN_MEMORY = SIZE_32MB;
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};
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struct ROM
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{
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// BootROM. See EE Users Manual page 20.
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static constexpr size_t SIZE_BOOT_ROM = SIZE_4MB;
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// ROM1. See PCSX2's source code ("MemoryTypes.h", "Memory.cpp", "IopMem.cpp").
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static constexpr size_t SIZE_ROM1 = SIZE_256KB;
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// EROM. See PCSX2's source code ("MemoryTypes.h", "Memory.cpp", "IopMem.cpp").
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static constexpr size_t SIZE_EROM = 0x001C0000; // 1792 kB.
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// ROM2. See PCSX2's source code ("MemoryTypes.h", "Memory.cpp", "IopMem.cpp").
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static constexpr size_t SIZE_ROM2 = SIZE_512KB;
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};
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struct VPU
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{
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struct VIF
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{
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// Number of instructions is based off the CMD field in the VIFcode, without the leading interrupt bit and the m bit in the UNPACK instructions. See EE Users Manual page 87.
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static constexpr int NUMBER_INSTRUCTIONS = 34;
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static constexpr int NUMBER_VIF_CORES = 2;
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};
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struct VU
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{
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static constexpr int NUMBER_VF_REGISTERS = 32;
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static constexpr int NUMBER_VI_REGISTERS = 16;
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static constexpr int NUMBER_VU_CORES = 2;
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static constexpr int NUMBER_VU0_CCR_REGISTERS = 32;
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static constexpr int NUMBER_VU_INSTRUCTIONS = 164;
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static constexpr double VU_CLK_SPEED = 147456000.0; // 147.456 MHz.
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};
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};
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static constexpr double EEBUS_CLK_SPEED = 150000000.0; // 150 MHz.
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};
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struct IOP
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{
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struct IOPCore
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{
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struct R3000
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{
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static constexpr int NUMBER_GP_REGISTERS = 32;
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static constexpr int NUMBER_SYSCALLS = 256; // TODO: get real value.
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static constexpr int NUMBER_EXCEPTIONS = 14;
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};
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struct COP0
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{
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static constexpr int NUMBER_REGISTERS = 32;
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};
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struct ScratchpadMemory
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{
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// IOP scratchpad memory - see http://www.psxdev.net/forum/viewtopic.php?f=49&t=147
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static constexpr size_t SIZE_SCRATCHPAD_MEMORY = SIZE_1KB;
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};
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struct MMU
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{
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static constexpr uptr VADDRESS_SPECIAL_1_LOWER_BOUND = 0x00000000;
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static constexpr uptr VADDRESS_SPECIAL_1_UPPER_BOUND = 0x001FFFFF;
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static constexpr uptr VADDRESS_SPECIAL_2_LOWER_BOUND = 0xFFC00000;
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static constexpr uptr VADDRESS_SPECIAL_2_UPPER_BOUND = 0xFFFFFFFF;
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};
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static constexpr int NUMBER_IOP_INSTRUCTIONS = 91;
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static constexpr double IOPCORE_CLK_SPEED = 37500000.0; // 37.5 MHz in PS2 mode, PS1 mode not supported for now (runs at original PSX speed of ~33 MHz).
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};
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struct DMAC
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{
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static constexpr int NUMBER_DMAC_CHANNELS = 14;
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static constexpr int NUMBER_PCR_REGISTERS = 2;
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static constexpr int NUMBER_ICR_REGISTERS = 2;
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static constexpr int NUMBER_ICR_IRQ_LINES = 7;
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};
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struct Timers
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{
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static constexpr int NUMBER_TIMERS = 6;
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};
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struct INTC
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{
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static constexpr int NUMBER_IRQ_LINES = 26;
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};
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struct IOPMemory
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{
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// IOP Memory. No official documentation - from PCSX2.
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static constexpr size_t SIZE_IOP_MEMORY = SIZE_2MB;
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};
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struct ParallelPort
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{
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// IOP Parallel Port. No official documentation - from online PSX docs.
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static constexpr size_t SIZE_PARALLEL_PORT = SIZE_64KB;
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};
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struct SIO0
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{
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static constexpr double SIO0_CLK_SPEED = 2000000.0; // 2 MHz. From here: https://en.wikipedia.org/wiki/PlayStation_2_technical_specifications.
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};
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struct SIO2
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{
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static constexpr int NUMBER_PORTS = 16;
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static constexpr double SIO2_CLK_SPEED = 2000000.0; // 2 MHz. From here: https://en.wikipedia.org/wiki/PlayStation_2_technical_specifications.
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};
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static constexpr double IOPBUS_CLK_SPEED = 37500000.0; // 37.5 MHz (same as IOPCore speed).
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};
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struct CDVD
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{
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static constexpr int NUMBER_NCMD_INSTRUCTIONS = 256;
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static constexpr int NUMBER_SCMD_INSTRUCTIONS = 256;
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static constexpr size_t SIZE_NVRAM = SIZE_1KB;
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static constexpr double CDVD_CLK_SPEED = 346250.0; // ~346 kHz, guess based off DVD 1x speed (1,385 kB/s) over a 32-bit bus.
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};
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struct SPU2
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{
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static constexpr size_t SIZE_MAIN_MEMORY = SIZE_2MB;
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static constexpr int NUMBER_CORES = 2;
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static constexpr int NUMBER_CORE_VOICES = 24;
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static constexpr double SPU2_CLK_SPEED = 8000000.0; // 8 MHz, not sure if correct but it will do for now. From here: https://en.wikipedia.org/wiki/PlayStation_2_technical_specifications.
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};
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struct GS
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{
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struct GSCore
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{
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static constexpr double GSCORE_CLK_SPEED = 150000000.0; // 150 MHz.
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};
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struct CRTC
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{
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struct NTSC
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{
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static constexpr double INTERLACED_FIELD_REFRESH_RATE = 59.94; // Vertical refresh rate (interlaced).
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static constexpr double PROGRESSIVE_FRAME_REFRESH_RATE = 59.82; // Vertical refresh rate (progressive).
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static constexpr double SCANLINE_REFRESH_RATE = 15734.0; // Horizontal refresh rate.
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};
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struct PAL
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{
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static constexpr double INTERLACED_FIELD_REFRESH_RATE = 50.00; // Vertical refresh rate (interlaced).
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static constexpr double PROGRESSIVE_FRAME_REFRESH_RATE = 49.76; // Vertical refresh rate (progressive).
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static constexpr double SCANLINE_REFRESH_RATE = 16625.0; // Horizontal refresh rate.
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};
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struct VESA
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{
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};
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struct DTV
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{
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};
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static constexpr double PCRTC_CLK_SPEED_DEFAULT = 1 / ((1 / 15734.0) / 2 / 640); // ~20 MHz, guess based on NTSC defaults of resX = 640 @ 15.734 kHz. Working: period of 1 cycle, divided by half (actual render vs. hblank), divided by number of resX pixels, all inversed for Hz.
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};
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};
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}; |