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101 lines
3.7 KiB
C++
101 lines
3.7 KiB
C++
#pragma once
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#include "Common/Types/Memory/ArrayByteMemory.hpp"
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#include "Common/Types/Register/SizedWordRegister.hpp"
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#include "Resources/Ee/Dmac/EeDmacChannels.hpp"
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#include "Resources/Ee/Dmac/EeDmacRegisters.hpp"
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/// EE DMAC Resources. See page 41 onwards of the EE Users Manual.
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struct REeDmac
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{
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REeDmac();
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/// DMA Channels. See page 42 of the EE Users Manual.
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/// Each channel contains the set of registers defined on page 73 in the EE Users Manual.
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EeDmacChannel_Asr<EeDmacChannelRegister_Chcr> channel_vif0; // CH 0
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EeDmacChannel_Asr<EeDmacChannelRegister_Chcr> channel_vif1; // CH 1
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EeDmacChannel_Asr<EeDmacChannelRegister_Chcr> channel_gif; // CH 2
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EeDmacChannel_Base<EeDmacChannelRegister_Chcr> channel_fromipu; // CH 3
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EeDmacChannel_Tadr<EeDmacChannelRegister_Chcr> channel_toipu; // CH 4
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EeDmacChannel_Base<EeDmacChannelRegister_Chcr_Sif0> channel_sif0; // CH 5 from IOP
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EeDmacChannel_Tadr<EeDmacChannelRegister_Chcr_Sif1> channel_sif1; // CH 6 to IOP
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EeDmacChannel_Base<EeDmacChannelRegister_Chcr_Sif2> channel_sif2; // CH 7 bidirectional w/ IOP
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EeDmacChannel_Sadr<EeDmacChannelRegister_Chcr> channel_fromspr; // CH 8
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EeDmacChannel_Tadr_Sadr<EeDmacChannelRegister_Chcr> channel_tospr; // CH 9
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/// Channel abstrations.
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EeDmacChannel channels[Constants::EE::DMAC::NUMBER_DMAC_CHANNELS];
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/// DMAC common registers. Defined on page 63 of the EE Users Manual.
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EeDmacRegister_Ctrl ctrl;
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EeDmacRegister_Stat stat;
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EeDmacRegister_Pcr pcr;
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EeDmacRegister_Swqc sqwc;
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EeDmacRegister_Rbsr rbsr;
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SizedWordRegister rbor;
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SizedWordRegister stadr;
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EeDmacRegister_EnableR enable_r;
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EeDmacRegister_EnableW enable_w;
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/// Misc registers/memory, unused but needed.
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/// See page 23 onwards of the EE Users Manual.
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ArrayByteMemory memory_8060;
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ArrayByteMemory memory_9060;
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ArrayByteMemory memory_a060;
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ArrayByteMemory memory_b030;
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ArrayByteMemory memory_b440;
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ArrayByteMemory memory_c030;
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ArrayByteMemory memory_c440;
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ArrayByteMemory memory_c830;
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ArrayByteMemory memory_d030;
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ArrayByteMemory memory_d090;
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ArrayByteMemory memory_d440;
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ArrayByteMemory memory_d490;
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ArrayByteMemory memory_e070;
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ArrayByteMemory memory_f500;
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ArrayByteMemory memory_f530;
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ArrayByteMemory memory_f5a0;
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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CEREAL_NVP(channel_vif0),
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CEREAL_NVP(channel_vif1),
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CEREAL_NVP(channel_gif),
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CEREAL_NVP(channel_fromipu),
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CEREAL_NVP(channel_toipu),
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CEREAL_NVP(channel_sif0),
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CEREAL_NVP(channel_sif1),
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CEREAL_NVP(channel_sif2),
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CEREAL_NVP(channel_fromspr),
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CEREAL_NVP(channel_tospr),
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CEREAL_NVP(ctrl),
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CEREAL_NVP(stat),
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CEREAL_NVP(pcr),
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CEREAL_NVP(sqwc),
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CEREAL_NVP(rbsr),
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CEREAL_NVP(rbor),
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CEREAL_NVP(stadr),
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CEREAL_NVP(enable_r),
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CEREAL_NVP(enable_w),
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CEREAL_NVP(memory_8060),
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CEREAL_NVP(memory_9060),
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CEREAL_NVP(memory_a060),
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CEREAL_NVP(memory_b030),
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CEREAL_NVP(memory_b440),
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CEREAL_NVP(memory_c030),
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CEREAL_NVP(memory_c440),
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CEREAL_NVP(memory_c830),
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CEREAL_NVP(memory_d030),
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CEREAL_NVP(memory_d090),
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CEREAL_NVP(memory_d440),
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CEREAL_NVP(memory_d490),
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CEREAL_NVP(memory_e070),
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CEREAL_NVP(memory_f500),
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CEREAL_NVP(memory_f530),
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CEREAL_NVP(memory_f5a0)
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);
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}
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};
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