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130 lines
4.4 KiB
C++
130 lines
4.4 KiB
C++
#pragma once
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#include "Common/Constants.hpp"
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#include "Common/Types/Bus/ByteBus.hpp"
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#include "Common/Types/Memory/ArrayByteMemory.hpp"
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#include "Common/Types/Mips/MipsCoprocessor.hpp"
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#include "Common/Types/Primitive.hpp"
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#include "Common/Types/Register/MapperHwordWordRegister.hpp"
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#include "Common/Types/Register/PcRegisters.hpp"
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#include "Common/Types/Register/SizedHwordRegister.hpp"
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#include "Common/Types/Register/SizedQwordRegister.hpp"
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#include "Resources/Ee/Vpu/Vu/VuUnitRegisters.hpp"
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class EeCoreCop0;
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/// A base class for a VU unit resource.
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class VuUnit_Base
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{
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public:
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VuUnit_Base(const int core_id);
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/// ID of the VU.
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int core_id;
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/// VU floating point registers (VF) (128-bit) and integer registers (VI) (16-bit).
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/// The first VI register is a constant 0 register.
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/// See VU Users Manual page 18.
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SizedQwordRegister vf[Constants::EE::VPU::VU::NUMBER_VF_REGISTERS];
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SizedHwordRegister vi[Constants::EE::VPU::VU::NUMBER_VI_REGISTERS];
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/// ACC register. Used by instructions such as ADDA and MULA.
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/// See VU Users Manual page 33.
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SizedQwordRegister acc;
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/// I register. Used to store immediate values.
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/// See VU Users Manual page 33.
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SizedWordRegister i;
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/// Q register. Used to store division/sqrt values.
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/// See VU Users Manual page 34.
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SizedWordRegister q;
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/// R register. Used to store random numbers generated.
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/// See VU Users Manual page 34.
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SizedWordRegister r;
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/// P register. Used to store EFU result values.
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/// See VU Users Manual page 34.
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SizedWordRegister p;
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/// The Flag registers (MAC, Status and Clipping), used to hold special results from calculations.
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/// See VU Users Manual page 40.
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/// The MAC register is dependant on the Status register for special functionality.
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VuUnitRegister_Status status;
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VuUnitRegister_Mac mac;
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VuUnitRegister_Clipping clipping;
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/// PC (program counter) register for micro subroutines.
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/// Also known as the TPC (termination PC), treated as the same thing.
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/// Made to be 32-bit even though only 16-bits are used (bus maps easier).
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WordPcRegister pc;
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/// The CMSAR register used for micro subroutine execution.
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/// See VU Users Manual page 202.
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VuUnitRegister_Cmsar cmsar;
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/// VU0 contains a physical memory map of its real working space (& mirrors) and the VU1 registers.
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/// For VU1, it is just a direct map of its real working space (needed to keep it OOP friendly).
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/// See EE Users Manual page 84.
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ByteBus<uhword> bus;
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/// Mappers for the VI (Hword) registers to WordRegisters.
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/// Used by different things, eg: ccr registers for VU0 and bus mappings for VU1.
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MapperHwordWordRegister vi_32[Constants::EE::VPU::VU::NUMBER_VI_REGISTERS];
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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CEREAL_NVP(core_id),
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CEREAL_NVP(acc),
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CEREAL_NVP(i),
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CEREAL_NVP(q),
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CEREAL_NVP(r),
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CEREAL_NVP(p),
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CEREAL_NVP(status),
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CEREAL_NVP(mac),
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CEREAL_NVP(clipping),
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CEREAL_NVP(pc),
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CEREAL_NVP(cmsar)
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);
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}
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};
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/// Represents VU0.
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/// It is attached as a MIPS coprocessor to the EE Core, as COP2.
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class VuUnit_Vu0 : public VuUnit_Base, public MipsCoprocessor
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{
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public:
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VuUnit_Vu0(const int core_id);
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/// Check if this VU unit is usable in macro mode from the EE Core by
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/// checking the EE Core's COP0.Status.CU2 bit.
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bool is_usable() override;
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/// VU memory, defined on page 18 of the VU Users Manual.
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ArrayByteMemory memory_micro; // 4 KiB.
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ArrayByteMemory memory_mem; // 4 KiB.
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/// The CCR (control registers) array (32) needed for the CTC2 and CFC2 EE Core instructions.
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/// See VU Users Manual page 200 & 201.
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/// The first 16 registers are allocated to the VU0 VI registers,
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/// with the last 16 registers allocated to various control registers.
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WordRegister* ccr[Constants::EE::VPU::VU::NUMBER_VU0_CCR_REGISTERS];
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/// Reference to the EE Core COP0 coprocessor, needed for the Status register.
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EeCoreCop0* cop0;
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};
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/// Represents VU1.
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class VuUnit_Vu1 : public VuUnit_Base
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{
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public:
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VuUnit_Vu1(const int core_id);
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/// VU memory, defined on page 18 of the VU Users Manual.
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ArrayByteMemory memory_micro; // 16 KiB.
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ArrayByteMemory memory_mem; // 16 KiB.
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};
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