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64 lines
2.2 KiB
C++
64 lines
2.2 KiB
C++
#pragma once
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#include "Common/Constants.hpp"
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#include "Common/Types/Memory/ArrayByteMemory.hpp"
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#include "Common/Types/Memory/ArrayHwordMemory.hpp"
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#include "Resources/Spu2/Spu2Cores.hpp"
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#include "Resources/Spu2/Spu2Registers.hpp"
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/// Describes the SPU2 (sound) resources that is attached through the IOP.
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/// No official documentation, except for the SPU2 Overview manual which does help.
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/// Most of the implementation comes from PCSX2. Thanks to everyone involved!
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/// The registers are assigned to the 0x1F900000 -> 0x1F900800 space in the IOP.
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struct RSpu2
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{
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RSpu2();
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/// SPU2 Cores.
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Spu2Core_Base core_0;
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Spu2Core_Base core_1;
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Spu2Core_Base* cores[Constants::SPU2::NUMBER_CORES];
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/// SPDIF Registers.
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SizedHwordRegister spdif_out;
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Spu2Register_Spdif_Irqinfo spdif_irqinfo;
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SizedHwordRegister spdif_07c4;
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SizedHwordRegister spdif_mode;
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SizedHwordRegister spdif_media;
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SizedHwordRegister spdif_07ca;
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SizedHwordRegister spdif_protect;
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/// SPU2 Local Memory (2MB).
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/// Addressed within the SPU2 system logic as 16-bit units (half-words) (address range 0x00_0000 -> 0x0F_FFFF).
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ArrayHwordMemory main_memory;
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/// Unknown memory / registers.
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/// There is a block of registers (with IOP MMU prefix address 0x1F900xxx) after both the core 0 and 1 known registers that are accessed.
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/// For core 0 this is in the range [0x346, 0x400).
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/// For core 1 this is in the range [0x746, 0x760), [0x7B0, 0x7C0) and [0x7CE, 0x800).
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ArrayByteMemory memory_0346;
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ArrayByteMemory memory_0746;
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ArrayByteMemory memory_07b0;
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ArrayByteMemory memory_07ce;
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template<class Archive>
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void serialize(Archive & archive)
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{
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archive(
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CEREAL_NVP(core_0),
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CEREAL_NVP(core_1),
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CEREAL_NVP(spdif_out),
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CEREAL_NVP(spdif_irqinfo),
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CEREAL_NVP(spdif_07c4),
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CEREAL_NVP(spdif_mode),
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CEREAL_NVP(spdif_media),
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CEREAL_NVP(spdif_07ca),
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CEREAL_NVP(spdif_protect),
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CEREAL_NVP(main_memory),
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CEREAL_NVP(memory_0346),
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CEREAL_NVP(memory_0746),
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CEREAL_NVP(memory_07b0),
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CEREAL_NVP(memory_07ce)
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);
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}
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}; |