mirror of
https://github.com/hch12907/orbum.git
synced 2024-06-02 19:38:16 -04:00
331 lines
12 KiB
C++
331 lines
12 KiB
C++
#include "Resources/Iop/Core/IopCoreInstruction.hpp"
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MipsInstructionInfo IOP_CORE_INSTRUCTION_TABLE[90] =
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{
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{"SLL", 29, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SRL", 30, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SRA", 31, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SLLV", 32, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SRLV", 33, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SRAV", 34, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"JR", 35, IopCoreInstruction::CPI_R3000_BRANCH},
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{"JALR", 36, IopCoreInstruction::CPI_R3000_BRANCH},
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{"SYSCALL", 37, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"BREAK", 38, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"MFHI", 39, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"MTHI", 40, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"MFLO", 41, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"MTLO", 42, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"MULT", 43, IopCoreInstruction::CPI_R3000_MULTIPLY},
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{"MULTU", 44, IopCoreInstruction::CPI_R3000_MULTIPLY},
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{"DIV", 45, IopCoreInstruction::CPI_R3000_DIVIDE},
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{"DIVU", 46, IopCoreInstruction::CPI_R3000_DIVIDE},
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{"ADD", 47, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"ADDU", 48, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SUB", 49, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SUBU", 50, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"AND", 51, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"OR", 52, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"XOR", 53, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"NOR", 54, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SLT", 55, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SLTU", 56, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"BLTZ", 57, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BGEZ", 58, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BLTZAL", 59, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BGEZAL", 60, IopCoreInstruction::CPI_R3000_BRANCH},
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{"MFC0", 61, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CFC0", 62, IopCoreInstruction::CPI_COP_DEFAULT},
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{"MTC0", 63, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CTC0", 64, IopCoreInstruction::CPI_COP_DEFAULT},
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{"RFE", 65, IopCoreInstruction::CPI_COP_DEFAULT},
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{"MFC2", 87, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CFC2", 88, IopCoreInstruction::CPI_COP_DEFAULT},
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{"MTC2", 89, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CTC2", 90, IopCoreInstruction::CPI_COP_DEFAULT},
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{"RTPS", 66, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCLIP", 67, IopCoreInstruction::CPI_COP_DEFAULT},
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{"OP", 68, IopCoreInstruction::CPI_COP_DEFAULT},
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{"DPCS", 69, IopCoreInstruction::CPI_COP_DEFAULT},
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{"INTPL", 70, IopCoreInstruction::CPI_COP_DEFAULT},
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{"MVMVA", 71, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCDS", 72, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CDP", 73, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCDT", 74, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCCS", 75, IopCoreInstruction::CPI_COP_DEFAULT},
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{"CC", 76, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCS", 77, IopCoreInstruction::CPI_COP_DEFAULT},
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{"NCT", 78, IopCoreInstruction::CPI_COP_DEFAULT},
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{"SQR", 79, IopCoreInstruction::CPI_COP_DEFAULT},
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{"DCPL", 80, IopCoreInstruction::CPI_COP_DEFAULT},
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{"DPCT", 81, IopCoreInstruction::CPI_COP_DEFAULT},
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{"AVSZ3", 82, IopCoreInstruction::CPI_COP_DEFAULT},
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{"AVSZ4", 83, IopCoreInstruction::CPI_COP_DEFAULT},
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{"RTPT", 84, IopCoreInstruction::CPI_COP_DEFAULT},
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{"GPF", 85, IopCoreInstruction::CPI_COP_DEFAULT},
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{"GPL", 86, IopCoreInstruction::CPI_COP_DEFAULT},
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{"J", 1, IopCoreInstruction::CPI_R3000_BRANCH},
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{"JAL", 2, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BEQ", 3, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BNE", 4, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BLEZ", 5, IopCoreInstruction::CPI_R3000_BRANCH},
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{"BGTZ", 6, IopCoreInstruction::CPI_R3000_BRANCH},
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{"ADDI", 7, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"ADDIU", 8, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SLTI", 9, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"SLTIU", 10, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"ANDI", 11, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"ORI", 12, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"XORI", 13, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"LUI", 14, IopCoreInstruction::CPI_R3000_DEFAULT},
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{"LB", 15, IopCoreInstruction::CPI_R3000_LOAD},
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{"LH", 16, IopCoreInstruction::CPI_R3000_LOAD},
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{"LWL", 17, IopCoreInstruction::CPI_R3000_LOAD},
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{"LW", 18, IopCoreInstruction::CPI_R3000_LOAD},
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{"LBU", 19, IopCoreInstruction::CPI_R3000_LOAD},
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{"LHU", 20, IopCoreInstruction::CPI_R3000_LOAD},
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{"LWR", 21, IopCoreInstruction::CPI_R3000_LOAD},
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{"SB", 22, IopCoreInstruction::CPI_R3000_STORE},
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{"SH", 23, IopCoreInstruction::CPI_R3000_STORE},
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{"SWL", 24, IopCoreInstruction::CPI_R3000_STORE},
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{"SW", 25, IopCoreInstruction::CPI_R3000_STORE},
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{"SWR", 26, IopCoreInstruction::CPI_R3000_STORE},
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{"LWC2", 27, IopCoreInstruction::CPI_R3000_LOAD},
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{"SWC2", 28, IopCoreInstruction::CPI_R3000_STORE},
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};
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IopCoreInstruction::IopCoreInstruction(const uword value) :
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MipsInstruction(value),
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info(nullptr)
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{
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}
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MipsInstructionInfo* IopCoreInstruction::lookup() const
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{
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switch (opcode())
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{
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case 0:
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{
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switch (funct())
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{
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case 0:
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return &IOP_CORE_INSTRUCTION_TABLE[0];
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case 2:
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return &IOP_CORE_INSTRUCTION_TABLE[1];
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case 3:
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return &IOP_CORE_INSTRUCTION_TABLE[2];
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case 4:
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return &IOP_CORE_INSTRUCTION_TABLE[3];
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case 6:
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return &IOP_CORE_INSTRUCTION_TABLE[4];
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case 7:
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return &IOP_CORE_INSTRUCTION_TABLE[5];
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case 8:
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return &IOP_CORE_INSTRUCTION_TABLE[6];
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case 9:
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return &IOP_CORE_INSTRUCTION_TABLE[7];
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case 12:
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return &IOP_CORE_INSTRUCTION_TABLE[8];
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case 13:
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return &IOP_CORE_INSTRUCTION_TABLE[9];
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case 16:
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return &IOP_CORE_INSTRUCTION_TABLE[10];
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case 17:
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return &IOP_CORE_INSTRUCTION_TABLE[11];
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case 18:
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return &IOP_CORE_INSTRUCTION_TABLE[12];
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case 19:
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return &IOP_CORE_INSTRUCTION_TABLE[13];
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case 24:
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return &IOP_CORE_INSTRUCTION_TABLE[14];
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case 25:
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return &IOP_CORE_INSTRUCTION_TABLE[15];
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case 26:
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return &IOP_CORE_INSTRUCTION_TABLE[16];
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case 27:
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return &IOP_CORE_INSTRUCTION_TABLE[17];
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case 32:
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return &IOP_CORE_INSTRUCTION_TABLE[18];
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case 33:
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return &IOP_CORE_INSTRUCTION_TABLE[19];
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case 34:
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return &IOP_CORE_INSTRUCTION_TABLE[20];
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case 35:
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return &IOP_CORE_INSTRUCTION_TABLE[21];
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case 36:
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return &IOP_CORE_INSTRUCTION_TABLE[22];
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case 37:
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return &IOP_CORE_INSTRUCTION_TABLE[23];
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case 38:
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return &IOP_CORE_INSTRUCTION_TABLE[24];
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case 39:
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return &IOP_CORE_INSTRUCTION_TABLE[25];
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case 42:
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return &IOP_CORE_INSTRUCTION_TABLE[26];
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case 43:
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return &IOP_CORE_INSTRUCTION_TABLE[27];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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case 1:
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{
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switch (rt())
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{
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case 0:
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return &IOP_CORE_INSTRUCTION_TABLE[28];
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case 1:
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return &IOP_CORE_INSTRUCTION_TABLE[29];
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case 15:
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return &IOP_CORE_INSTRUCTION_TABLE[30];
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case 16:
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return &IOP_CORE_INSTRUCTION_TABLE[31];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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case 16:
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{
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switch (rs())
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{
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case 0:
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return &IOP_CORE_INSTRUCTION_TABLE[32];
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case 2:
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return &IOP_CORE_INSTRUCTION_TABLE[33];
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case 4:
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return &IOP_CORE_INSTRUCTION_TABLE[34];
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case 6:
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return &IOP_CORE_INSTRUCTION_TABLE[35];
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case 16:
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return &IOP_CORE_INSTRUCTION_TABLE[36];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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case 18:
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{
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switch (funct())
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{
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case 0:
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{
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switch (rs())
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{
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case 0:
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return &IOP_CORE_INSTRUCTION_TABLE[37];
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case 2:
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return &IOP_CORE_INSTRUCTION_TABLE[38];
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case 4:
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return &IOP_CORE_INSTRUCTION_TABLE[39];
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case 6:
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return &IOP_CORE_INSTRUCTION_TABLE[40];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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case 1:
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return &IOP_CORE_INSTRUCTION_TABLE[41];
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case 6:
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return &IOP_CORE_INSTRUCTION_TABLE[42];
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case 12:
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return &IOP_CORE_INSTRUCTION_TABLE[43];
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case 16:
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return &IOP_CORE_INSTRUCTION_TABLE[44];
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case 17:
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return &IOP_CORE_INSTRUCTION_TABLE[45];
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case 18:
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return &IOP_CORE_INSTRUCTION_TABLE[46];
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case 19:
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return &IOP_CORE_INSTRUCTION_TABLE[47];
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case 20:
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return &IOP_CORE_INSTRUCTION_TABLE[48];
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case 21:
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return &IOP_CORE_INSTRUCTION_TABLE[49];
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case 27:
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return &IOP_CORE_INSTRUCTION_TABLE[50];
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case 28:
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return &IOP_CORE_INSTRUCTION_TABLE[51];
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case 30:
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return &IOP_CORE_INSTRUCTION_TABLE[52];
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case 32:
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return &IOP_CORE_INSTRUCTION_TABLE[53];
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case 40:
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return &IOP_CORE_INSTRUCTION_TABLE[54];
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case 41:
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return &IOP_CORE_INSTRUCTION_TABLE[55];
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case 42:
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return &IOP_CORE_INSTRUCTION_TABLE[56];
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case 45:
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return &IOP_CORE_INSTRUCTION_TABLE[57];
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case 46:
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return &IOP_CORE_INSTRUCTION_TABLE[58];
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case 48:
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return &IOP_CORE_INSTRUCTION_TABLE[59];
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case 61:
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return &IOP_CORE_INSTRUCTION_TABLE[60];
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case 62:
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return &IOP_CORE_INSTRUCTION_TABLE[61];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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case 2:
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return &IOP_CORE_INSTRUCTION_TABLE[62];
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case 3:
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return &IOP_CORE_INSTRUCTION_TABLE[63];
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case 4:
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return &IOP_CORE_INSTRUCTION_TABLE[64];
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case 5:
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return &IOP_CORE_INSTRUCTION_TABLE[65];
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case 6:
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return &IOP_CORE_INSTRUCTION_TABLE[66];
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case 7:
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return &IOP_CORE_INSTRUCTION_TABLE[67];
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case 8:
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return &IOP_CORE_INSTRUCTION_TABLE[68];
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case 9:
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return &IOP_CORE_INSTRUCTION_TABLE[69];
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case 10:
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return &IOP_CORE_INSTRUCTION_TABLE[70];
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case 11:
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return &IOP_CORE_INSTRUCTION_TABLE[71];
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case 12:
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return &IOP_CORE_INSTRUCTION_TABLE[72];
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case 13:
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return &IOP_CORE_INSTRUCTION_TABLE[73];
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case 14:
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return &IOP_CORE_INSTRUCTION_TABLE[74];
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case 15:
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return &IOP_CORE_INSTRUCTION_TABLE[75];
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case 32:
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return &IOP_CORE_INSTRUCTION_TABLE[76];
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case 33:
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return &IOP_CORE_INSTRUCTION_TABLE[77];
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case 34:
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return &IOP_CORE_INSTRUCTION_TABLE[78];
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case 35:
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return &IOP_CORE_INSTRUCTION_TABLE[79];
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case 36:
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return &IOP_CORE_INSTRUCTION_TABLE[80];
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case 37:
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return &IOP_CORE_INSTRUCTION_TABLE[81];
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case 38:
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return &IOP_CORE_INSTRUCTION_TABLE[82];
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case 40:
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return &IOP_CORE_INSTRUCTION_TABLE[83];
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case 41:
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return &IOP_CORE_INSTRUCTION_TABLE[84];
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case 42:
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return &IOP_CORE_INSTRUCTION_TABLE[85];
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case 43:
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return &IOP_CORE_INSTRUCTION_TABLE[86];
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case 46:
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return &IOP_CORE_INSTRUCTION_TABLE[87];
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case 50:
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return &IOP_CORE_INSTRUCTION_TABLE[88];
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case 58:
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return &IOP_CORE_INSTRUCTION_TABLE[89];
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default:
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throw std::runtime_error("IOP Core: Could not determine instruction");
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}
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}
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