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https://github.com/emu-russia/pureikyubu.git
synced 2024-06-02 03:27:30 -04:00
91 lines
3.8 KiB
C
91 lines
3.8 KiB
C
#pragma once
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// EXI registers (all registers are 32-bit)
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// (chan 0)
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#define EXI0_CSR 0x0C006800 // Communication Status Register
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#define EXI0_MADR 0x0C006804 // DMA Memory Address Register
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#define EXI0_LEN 0x0C006808 // DMA Length Register
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#define EXI0_CR 0x0C00680C // Control Register
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#define EXI0_DATA 0x0C006810 // Data Register
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// (chan 1)
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#define EXI1_CSR 0x0C006814 // -"-
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#define EXI1_MADR 0x0C006818
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#define EXI1_LEN 0x0C00681C
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#define EXI1_CR 0x0C006820
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#define EXI1_DATA 0x0C006824
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// (chan 2)
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#define EXI2_CSR 0x0C006828 // -"-
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#define EXI2_MADR 0x0C00682C
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#define EXI2_LEN 0x0C006830
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#define EXI2_CR 0x0C006834
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#define EXI2_DATA 0x0C006838
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// EXI Communication Status Register mask
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#define EXI_CSR_ROMDIS (1 << 13) // disable IPL decryption logic
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#define EXI_CSR_EXT (1 << 12) // attached status
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#define EXI_CSR_EXTINT (1 << 11) // attached / detached interrupt
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#define EXI_CSR_EXTINTMSK (1 << 10)
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#define EXI_CSR_CS2B (1 << 9) // device select bits
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#define EXI_CSR_CS1B (1 << 8)
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#define EXI_CSR_CS0B (1 << 7)
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#define EXI_CSR_CLK(reg) ((reg >> 4) & 7)// dont care (bus clock)
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#define EXI_CSR_TCINT (1 << 3) // transfer complete interrupt
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#define EXI_CSR_TCINTMSK (1 << 2)
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#define EXI_CSR_EXIINT (1 << 1) // exi interrupt from devices (IRQ line)
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#define EXI_CSR_EXIINTMSK (1 << 0)
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#define EXI_CSR_INTERRUPTS (EXI_CSR_EXTINT | EXI_CSR_TCINT | EXI_CSR_EXIINT)
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#define EXI_CSR_READONLY (EXI_CSR_EXT | EXI_CSR_EXTINT | EXI_CSR_TCINT | EXI_CSR_EXIINT)
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// EXI Control Register mask
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#define EXI_CR_TLEN(reg) ((reg >> 4) & 3)// immediate data size
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#define EXI_CR_RW(reg) ((reg >> 2) & 3)// direction (read/write)
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#define EXI_CR_DMA (1 << 1) // select dma transfer (dma/immediate)
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#define EXI_CR_TSTART (1 << 0) // start transfer
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// EXI registers block
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struct EXIRegs
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{
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volatile uint32_t csr; // communication register
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volatile uint32_t madr; // memory address (32 byte aligned)
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volatile uint32_t len; // size (32 bytes aligned)
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volatile uint32_t cr; // control register
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volatile uint32_t data; // immediate data register
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};
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// ---------------------------------------------------------------------------
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// hardware API
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// EXI state (registers and other data)
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struct EIControl
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{
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// hardware state
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EXIRegs regs[3]; // exi registers
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SRAM sram; // battery-backed memory (misc console settings)
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uint8_t* ansiFont; // bootrom font (loaded from file)
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uint8_t* sjisFont;
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uint32_t rtcVal; // last updated RTC value
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uint32_t ad16; // trace step
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char uart[256]; // UART I/O buffer
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uint32_t upos; // UART buffer position (if > 0, UART buffer not empty)
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// helper variables used for EXI transfers
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int32_t chan, sel; // curent selected chan:device (sel=-1 no device)
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uint32_t ad16_cmd; // command for AD16
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bool firstImm; // first imm write is always command
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uint32_t mxaddr; // "address" inside MX chip for transfers
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bool uartNE;
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bool log; // allow log EXI activities
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bool osReport; // allow UART debugger output (log not affecting this)
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};
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extern EIControl exi;
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// for memcards and other external devices
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void EXIUpdateInterrupts();
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void EXIAttach(int chan); // connect device
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void EXIDetach(int chan); // disconnect device
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void EIOpen(HWConfig* config);
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void EIClose();
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