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Adjust opcode timing as reported by pi1541.

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This commit is contained in:
BearOso 2022-10-21 17:42:40 -05:00
parent 28be1a196d
commit a33f0f3540
2 changed files with 5 additions and 1 deletions
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1
cpuaddr.h
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@ -513,7 +513,6 @@ static inline uint32 StackRelativeIndirectIndexed (AccessMode a) // (d,S),Y
if (a & READ)
OpenBus = (uint8) (addr >> 8);
addr = (addr + Registers.Y.W + ICPU.ShiftedDB) & 0xffffff;
AddCycles(ONE_CYCLE);
return (addr);
}

5
cpuops.cpp
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@ -1406,11 +1406,13 @@ bOP(70Slow, RelativeSlow, CheckOverflow(), 0, CheckEmulation())
static void Op82 (void)
{
S9xSetPCBase(ICPU.ShiftedPB + RelativeLong(JUMP));
AddCycles(ONE_CYCLE);
}
static void Op82Slow (void)
{
S9xSetPCBase(ICPU.ShiftedPB + RelativeLongSlow(JUMP));
AddCycles(ONE_CYCLE);
}
/* Flag Instructions ******************************************************* */
@ -2851,6 +2853,7 @@ static void Op22E1 (void)
PushW(Registers.PCw - 1);
Registers.SH = 1;
S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
}
static void Op22E0 (void)
@ -2859,6 +2862,7 @@ static void Op22E0 (void)
PushB(Registers.PB);
PushW(Registers.PCw - 1);
S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
}
static void Op22Slow (void)
@ -2869,6 +2873,7 @@ static void Op22Slow (void)
if (CheckEmulation())
Registers.SH = 1;
S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
}
static void Op6BE1 (void)