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defactored some functions

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kirjavascript 2021-04-29 23:44:09 +01:00
parent a02d088901
commit a604c7f8a4
1 changed files with 18 additions and 19 deletions
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37
emu/src/vdp.rs
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@ -77,7 +77,7 @@ impl VDP {
pub fn write(mem: &mut Mem, mut address: u32, value: u32) {
address &= 0x1F;
if address < 0x4 {
VDP::write_data_port(mem, value);
mem.vdp.write_data_port(value);
} else if address < 0x8 {
VDP::write_control_port(mem, value);
} else {
@ -85,35 +85,34 @@ impl VDP {
}
}
pub fn write_data(mem: &mut Mem, target: VDPType, value: u32) {
let Mem { vdp, .. } = mem;
fn write_data(&mut self, target: VDPType, value: u32) {
match target {
VDPType::VRAM => {
vdp.VRAM[vdp.control_address as usize] = ((value >> 8) & 0xff) as _;
vdp.VRAM[vdp.control_address as usize + 1] = (value & 0xff) as _;
self.VRAM[self.control_address as usize] = ((value >> 8) & 0xff) as _;
self.VRAM[self.control_address as usize + 1] = (value & 0xff) as _;
},
VDPType::CRAM => {
vdp.CRAM[((vdp.control_address & 0x7f) >> 1) as usize] = value as _;
self.CRAM[((self.control_address & 0x7f) >> 1) as usize] = value as _;
},
VDPType::VSRAM => {
vdp.VSRAM[((vdp.control_address & 0x7f) >> 1) as usize] = value as _;
self.VSRAM[((self.control_address & 0x7f) >> 1) as usize] = value as _;
},
}
}
fn write_data_port(mem: &mut Mem, value: u32) {
if mem.vdp.control_code & 1 == 1 {
VDP::write_data(mem, VDPType::from(mem.vdp.control_code & 0xE), value);
fn write_data_port(&mut self, value: u32) {
if self.control_code & 1 == 1 {
self.write_data(VDPType::from(self.control_code & 0xE), value);
}
mem.vdp.control_address = (mem.vdp.control_address + mem.vdp.registers[15] as u32) & 0xffff;
mem.vdp.control_pending = false;
self.control_address = (self.control_address + self.registers[15] as u32) & 0xffff;
self.control_pending = false;
if mem.vdp.dma_pending {
mem.vdp.dma_pending = false;
for _ in 0..mem.vdp.dma_length() {
mem.vdp.VRAM[mem.vdp.control_address as usize] = (value >> 8) as _;
mem.vdp.control_address += mem.vdp.registers[15] as u32;
mem.vdp.control_address &= 0xFFFF;
if self.dma_pending {
self.dma_pending = false;
for _ in 0..self.dma_length() {
self.VRAM[self.control_address as usize] = (value >> 8) as _;
self.control_address += self.registers[15] as u32;
self.control_address &= 0xFFFF;
}
}
}
@ -138,7 +137,7 @@ impl VDP {
for _ in 0..mem.vdp.dma_length() {
let word = mem.read_u16(source);
source += 2;
VDP::write_data(mem, VDPType::from(mem.vdp.control_code & 0x7), word);
mem.vdp.write_data(VDPType::from(mem.vdp.control_code & 0x7), word);
mem.vdp.control_address += mem.vdp.registers[15] as u32;
mem.vdp.control_address &= 0xffff;
println!("DMA write {}", source);