spapr/ddw: Implement 64bit query extension

PAPR 2.8 (2018) defines an extension to return 64bit value for
the largest TCE block in "ibm,query-pe-dma-window". Recent Linux kernels
support this already.

This adds the extension and supports the older format.

This advertises a bigger window for the new format as the biggest
window with 2M pages below the start of the 64bit window as it is
the maximum we will see in practice.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220623073136.1380214-1-aik@ozlabs.ru>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Alexey Kardashevskiy 2022-06-23 17:31:36 +10:00 committed by Daniel Henrique Barboza
parent 31cc81f728
commit c0e765dafb
2 changed files with 18 additions and 6 deletions

View file

@ -2360,8 +2360,9 @@ int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbState *phb,
cpu_to_be32(RTAS_IBM_REMOVE_PE_DMA_WINDOW)
};
uint32_t ddw_extensions[] = {
cpu_to_be32(1),
cpu_to_be32(RTAS_IBM_RESET_PE_DMA_WINDOW)
cpu_to_be32(2),
cpu_to_be32(RTAS_IBM_RESET_PE_DMA_WINDOW),
cpu_to_be32(1), /* 1: ibm,query-pe-dma-window 6 outputs, PAPR 2.8 */
};
SpaprTceTable *tcet;
SpaprDrc *drc;

View file

@ -100,7 +100,7 @@ static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu,
uint64_t buid;
uint32_t avail, addr, pgmask = 0;
if ((nargs != 3) || (nret != 5)) {
if ((nargs != 3) || ((nret != 5) && (nret != 6))) {
goto param_error_exit;
}
@ -118,9 +118,20 @@ static void rtas_ibm_query_pe_dma_window(PowerPCCPU *cpu,
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
rtas_st(rets, 1, avail);
rtas_st(rets, 2, 0x80000000); /* The largest window we can possibly have */
rtas_st(rets, 3, pgmask);
rtas_st(rets, 4, 0); /* DMA migration mask, not supported */
if (nret == 6) {
/*
* Set the Max TCE number as 1<<(58-21) = 0x20.0000.0000
* 1<<59 is the huge window start and 21 is 2M page shift.
*/
rtas_st(rets, 2, 0x00000020);
rtas_st(rets, 3, 0x00000000);
rtas_st(rets, 4, pgmask);
rtas_st(rets, 5, 0); /* DMA migration mask, not supported */
} else {
rtas_st(rets, 2, 0x80000000);
rtas_st(rets, 3, pgmask);
rtas_st(rets, 4, 0); /* DMA migration mask, not supported */
}
trace_spapr_iommu_ddw_query(buid, addr, avail, 0x80000000, pgmask);
return;