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[GPU] DC_LUT_PWL_DATA comment fix [ci skip]

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Triang3l 2022-05-05 13:13:30 +03:00
parent c794d0d538
commit 9c8e0cc53e
1 changed files with 1 additions and 1 deletions
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src/xenia/gpu/command_processor.cc
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@ -405,7 +405,7 @@ void CommandProcessor::WriteRegister(uint32_t index, uint32_t value) {
auto& gamma_ramp_rw_index = regs.Get<reg::DC_LUT_RW_INDEX>();
// Bit 7 of the index is ignored for PWL.
uint32_t gamma_ramp_rw_index_pwl = gamma_ramp_rw_index.rw_index & 0x7F;
// DC_LUT_RW_INDEX is likely in the red, green, blue order because
// DC_LUT_PWL_DATA is likely in the red, green, blue order because
// DC_LUT_SEQ_COLOR is, but the write enable mask is blue, green, red.
bool write_gamma_ramp_component =
(regs[XE_GPU_REG_DC_LUT_WRITE_EN_MASK].u32 &