mirror of
https://github.com/JaCzekanski/Avocado.git
synced 2024-06-02 19:27:41 -04:00
messing around with io
This commit is contained in:
parent
5fbd033a02
commit
fa08c01715
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@ -216,13 +216,13 @@ add_library(core STATIC
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src/device/dma/dma6_channel.cpp
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src/device/dma/dma6_channel.cpp
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src/device/dma/dma_channel.cpp
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src/device/dma/dma_channel.cpp
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src/device/expansion2.cpp
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src/device/expansion2.cpp
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src/device/gpu/color_depth.cpp
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src/device/gpu/gpu.cpp
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src/device/gpu/gpu.cpp
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src/device/gpu/psx_color.cpp
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src/device/gpu/psx_color.cpp
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src/device/gpu/render/dither.cpp
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src/device/gpu/render/dither.cpp
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src/device/gpu/render/render_line.cpp
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src/device/gpu/render/render_line.cpp
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src/device/gpu/render/render_rectangle.cpp
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src/device/gpu/render/render_rectangle.cpp
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src/device/gpu/render/render_triangle.cpp
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src/device/gpu/render/render_triangle.cpp
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src/device/gpu/render/texture_utils.cpp
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src/device/interrupt.cpp
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src/device/interrupt.cpp
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src/device/mdec/algorithm.cpp
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src/device/mdec/algorithm.cpp
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src/device/mdec/mdec.cpp
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src/device/mdec/mdec.cpp
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126
src/system.cpp
126
src/system.cpp
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@ -101,7 +101,7 @@ constexpr void write_io(Device& periph, uint32_t addr, T data) {
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#define TIMING(BITS, CYCLES) timing<T, (BITS)>(CYCLES)
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#define TIMING(BITS, CYCLES) timing<T, (BITS)>(CYCLES)
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#define READ_IO(begin, end, periph, bits, cycles) \
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#define READ_IO(begin, end, periph, bits, cycles) \
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if (addr >= (begin) && addr < (end)) { \
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{ \
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TIMING(bits, cycles); \
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TIMING(bits, cycles); \
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auto data = read_io<T>((periph), addr - (begin)); \
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auto data = read_io<T>((periph), addr - (begin)); \
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\
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\
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@ -109,18 +109,16 @@ constexpr void write_io(Device& periph, uint32_t addr, T data) {
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return data; \
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return data; \
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}
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}
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#define READ_IO32(begin, end, periph, cycles) \
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#define READ_IO32(begin, end, periph, cycles) \
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if (addr >= (begin) && addr < (end)) { \
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{ \
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T data = 0; \
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if constexpr (sizeof(T) == 4) { \
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if (sizeof(T) == 4) { \
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TIMING(32, cycles); \
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TIMING(32, cycles); \
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auto data = (periph)->read(addr - (begin)); \
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data = (periph)->read(addr - (begin)); \
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LOG_IO(IO_LOG_ENTRY::MODE::READ, sizeof(T) * 8, address, data, cpu->PC); \
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} else { \
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return data; \
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fmt::print("[SYS] R Unsupported access to " #periph " with bit size {}\n", static_cast<int>(sizeof(T) * 8)); \
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} else { \
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} \
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return 0; \
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\
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} \
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LOG_IO(IO_LOG_ENTRY::MODE::READ, sizeof(T) * 8, address, data, cpu->PC); \
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return data; \
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}
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}
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#define WRITE_IO(begin, end, periph, bits, cycles) \
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#define WRITE_IO(begin, end, periph, bits, cycles) \
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@ -132,60 +130,79 @@ constexpr void write_io(Device& periph, uint32_t addr, T data) {
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return; \
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return; \
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}
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}
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#define WRITE_IO32(begin, end, periph, cycles) \
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#define WRITE_IO32(begin, end, periph, cycles) \
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if (addr >= (begin) && addr < (end)) { \
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if (addr >= (begin) && addr < (end)) { \
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if (sizeof(T) == 4) { \
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if (sizeof(T) == 4) { \
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TIMING(32, cycles); \
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TIMING(32, cycles); \
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(periph)->write(addr - (begin), data); \
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(periph)->write(addr - (begin), data); \
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} else { \
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} else { \
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fmt::print("[SYS] W Unsupported access to " #periph " with bit size {}\n", static_cast<int>(sizeof(T) * 8)); \
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} \
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} \
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\
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\
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LOG_IO(IO_LOG_ENTRY::MODE::WRITE, sizeof(T) * 8, address, data, cpu->PC); \
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LOG_IO(IO_LOG_ENTRY::MODE::WRITE, sizeof(T) * 8, address, data, cpu->PC); \
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return; \
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return; \
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}
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}
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#define BIOS_BASE (0x1fc00000)
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#define RAM_BASE (0x00000000)
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#define SCRATCHPAD_BASE (0x1f800000)
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#define EXPANSION_BASE (0x1f000000)
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#define IO_BASE (0x1f801000)
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#define BIOS_SIZE (512 * 1024)
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#define RAM_SIZE (2 * 1024 * 1024)
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#define SCRATCHPAD_SIZE (1024)
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#define EXPANSION_SIZE (1 * 1024 * 1024)
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#define IO_SIZE (0x2000)
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template <typename T>
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template <typename T>
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INLINE T System::readMemory(uint32_t address) {
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INLINE T System::readMemory(uint32_t address) {
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static_assert(std::is_same<T, uint8_t>() || std::is_same<T, uint16_t>() || std::is_same<T, uint32_t>(), "Invalid type used");
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static_assert(std::is_same<T, uint8_t>() || std::is_same<T, uint16_t>() || std::is_same<T, uint32_t>(), "Invalid type used");
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uint32_t addr = align_mips<T>(address);
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uint8_t segment = (address & 0xf000'0000) >> 28;
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uint16_t part = (address & 0x0fe00000) >> 20;
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if (segment < 0xc) {
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uint8_t segment = (address & 0xf0000000) >> 28;
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uint8_t part = (address & 0x0fc0'0000) >> 22;
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uint32_t addr = align_mips<T>(address);
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if (segment < 0xf) {
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switch (part) {
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switch (part) {
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case 0: TIMING(32, 4); return read_fast<T>(ram.data(), (addr - RAM_BASE) & (RAM_SIZE - 1));
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case (0x00 >> 2): TIMING(32, 4); return read_fast<T>(ram.data(), (addr - RAM_BASE) & (RAM_SIZE - 1));
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case (0xf0 >> 2): TIMING(8, 6); return read_fast<T>(expansion.data(), addr - EXPANSION_BASE);
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case 0xf0: TIMING(8, 6); return read_fast<T>(expansion.data(), addr - EXPANSION_BASE);
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case (0xf8 >> 2): { // scratch/ io / exp
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case 0xf8: // scratch/ io / exp
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if (in_range<SCRATCHPAD_BASE, SCRATCHPAD_SIZE>(addr)) {
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if (in_range<SCRATCHPAD_BASE, SCRATCHPAD_SIZE>(addr)) {
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TIMING(32, 0);
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TIMING(32, 0);
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return read_fast<T>(scratchpad.data(), addr - SCRATCHPAD_BASE);
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return read_fast<T>(scratchpad.data(), addr - SCRATCHPAD_BASE);
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} else {
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uint8_t dev = (addr & 0xff0) >> 4;
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switch (dev) {
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case 0x0 ... 0x3: READ_IO(0x1f801000, 0x1f801024, memoryControl, 32, 2);
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case 0x4: READ_IO(0x1f801040, 0x1f801050, controller, 32, 2);
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case 0x5: READ_IO(0x1f801050, 0x1f801060, serial, 32, 2);
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case 0x6: READ_IO(0x1f801060, 0x1f801064, memoryControl, 32, 2);
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case 0x7: READ_IO(0x1f801070, 0x1f801078, interrupt, 32, 2);
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case 0x8 ... 0xf: READ_IO(0x1f801080, 0x1f801100, dma, 32, 2);
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case 0x10: READ_IO(0x1f801100, 0x1f801110, timer[0], 32, 2);
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case 0x11: READ_IO(0x1f801110, 0x1f801120, timer[1], 32, 2);
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case 0x12: READ_IO(0x1f801120, 0x1f801130, timer[2], 32, 2);
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case 0x80: READ_IO(0x1f801800, 0x1f801804, cdrom, 8, 8);
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case 0x81: READ_IO32(0x1f801810, 0x1f801818, gpu, 2);
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case 0x82: READ_IO32(0x1f801820, 0x1f801828, mdec, 3);
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case 0xc0 ... 0xff: READ_IO(0x1f801C00, 0x1f802000, spu, 16, 16);
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default:
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fmt::print("[SYS] R Unhandled address at 0x{:08x}\n", address);
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cpu->busError();
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break;
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// case 0x13 - 0x7f - unmapped
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// case 0x83 - 0xbf - unmapped
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}
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}
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}
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// READ_IO(0x1f802000, 0x1f802067, expansion2, 8, 10);
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}
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READ_IO(0x1f801000, 0x1f801024, memoryControl, 32, 2);
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case (0xfc >> 2): TIMING(8, 6); return read_fast<T>(bios.data(), addr - BIOS_BASE);
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READ_IO(0x1f801040, 0x1f801050, controller, 32, 2);
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default:
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READ_IO(0x1f801050, 0x1f801060, serial, 32, 2);
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fmt::print("[SYS] R Unhandled address at 0x{:08x}\n", address);
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READ_IO(0x1f801060, 0x1f801064, memoryControl, 32, 2);
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cpu->busError();
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READ_IO(0x1f801070, 0x1f801078, interrupt, 32, 2);
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READ_IO(0x1f801080, 0x1f801100, dma, 32, 2);
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READ_IO(0x1f801100, 0x1f801110, timer[0], 32, 2);
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READ_IO(0x1f801110, 0x1f801120, timer[1], 32, 2);
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READ_IO(0x1f801120, 0x1f801130, timer[2], 32, 2);
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READ_IO(0x1f801800, 0x1f801804, cdrom, 8, 8);
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READ_IO32(0x1f801810, 0x1f801818, gpu, 2);
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READ_IO32(0x1f801820, 0x1f801828, mdec, 3);
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READ_IO(0x1f801C00, 0x1f802000, spu, 16, 16);
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READ_IO(0x1f802000, 0x1f802067, expansion2, 8, 10);
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break;
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break;
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case 0xfc: TIMING(8, 6); return read_fast<T>(bios.data(), addr - BIOS_BASE);
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}
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}
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} else {
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} else {
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if (in_range<0xfffe0130, 4>(address) && sizeof(T) == 4) {
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if (sizeof(T) == 4 && address == 0xfffe0130) {
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TIMING(32, 1);
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TIMING(32, 1);
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auto data = cacheControl->read(0);
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auto data = cacheControl->read(0);
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LOG_IO(IO_LOG_ENTRY::MODE::READ, sizeof(T) * 8, address, data, cpu->PC);
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LOG_IO(IO_LOG_ENTRY::MODE::READ, sizeof(T) * 8, address, data, cpu->PC);
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@ -368,15 +385,13 @@ void System::emulateFrame() {
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gpu->gpuLogList.clear();
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gpu->gpuLogList.clear();
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// gpu->prevVram = gpu->vram;
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// gpu->prevVram = gpu->vram;
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int cpuCyclesConsumed = 0;
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for (;;) {
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for (;;) {
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int systemCycles = 0x1000;
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int systemCycles = 0x100;
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cpuStalledCycles = 0;
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cpuStalledCycles = 0;
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if (!cpu->executeInstructions(systemCycles)) {
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if (!cpu->executeInstructions(systemCycles)) {
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return;
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return;
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}
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}
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systemCycles += cpuStalledCycles;
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systemCycles += cpuStalledCycles;
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cpuCyclesConsumed += systemCycles;
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dma->step();
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dma->step();
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cdrom->step(systemCycles);
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cdrom->step(systemCycles);
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@ -393,7 +408,6 @@ void System::emulateFrame() {
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controller->step(systemCycles);
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controller->step(systemCycles);
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if (gpu->emulateGpuCycles(systemCycles)) {
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if (gpu->emulateGpuCycles(systemCycles)) {
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// fmt::print("cpuCyclesConsumed: {} (*60 == {})\n",cpuCyclesConsumed, cpuCyclesConsumed*60);
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interrupt->trigger(interrupt::VBLANK);
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interrupt->trigger(interrupt::VBLANK);
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return; // frame emulated
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return; // frame emulated
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}
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}
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