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Replaced S8/U8 with S08/U08

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This commit is contained in:
Alexandro Sánchez Bach 2016-04-10 23:02:03 +02:00
parent 1495301d3f
commit 3c9d46cfee
65 changed files with 357 additions and 357 deletions
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2
nucleus/cpu/backend/assembler.h
View file

@ -49,7 +49,7 @@ public:
curAddr = reinterpret_cast<void*>(reinterpret_cast<intptr_t>(curAddr) + sizeof(T));
curSize += sizeof(T);
}
void emit8(U8 data) { emit(data); }
void emit8(U08 data) { emit(data); }
void emit16(U16 data) { emit(data); }
void emit32(U32 data) { emit(data); }
void emit64(U64 data) { emit(data); }

94
nucleus/cpu/backend/ppc/ppc_assembler.cpp
View file

@ -111,8 +111,8 @@ void PPCAssembler::b(Label label) { emitFormI(0x48000000, 0/*TODO*/); }
void PPCAssembler::ba(Label label) { emitFormI(0x48000002, 0/*TODO*/); }
void PPCAssembler::bl(Label label) { emitFormI(0x48000001, 0/*TODO*/); }
void PPCAssembler::bla(Label label) { emitFormI(0x48000003, 0/*TODO*/); }
void PPCAssembler::bc(U8 bo, U8 bi, U16 bd) { emitFormB(0x40000000, bo, bi, bd); }
void PPCAssembler::bc(U8 bo, U8 bi, Label label) { emitFormB(0x40000000, bo, bi, 0/*TODO*/); }
void PPCAssembler::bc(U08 bo, U08 bi, U16 bd) { emitFormB(0x40000000, bo, bi, bd); }
void PPCAssembler::bc(U08 bo, U08 bi, Label label) { emitFormB(0x40000000, bo, bi, 0/*TODO*/); }
void PPCAssembler::blt(RegCR cr, Label label) { bc(12, (4 * cr) + 0, label); }
void PPCAssembler::ble(RegCR cr, Label label) { bc( 4, (4 * cr) + 1, label); }
void PPCAssembler::beq(RegCR cr, Label label) { bc(12, (4 * cr) + 2, label); }
@ -120,8 +120,8 @@ void PPCAssembler::bge(RegCR cr, Label label) { bc( 4, (4 * cr) + 0, label); }
void PPCAssembler::bgt(RegCR cr, Label label) { bc(12, (4 * cr) + 1, label); }
void PPCAssembler::bne(RegCR cr, Label label) { bc( 4, (4 * cr) + 2, label); }
void PPCAssembler::bso(RegCR cr, Label label) { bc(12, (4 * cr) + 3, label); }
void PPCAssembler::bca(U8 bo, U8 bi, U16 bd) { emitFormB(0x40000002, bo, bi, bd); }
void PPCAssembler::bca(U8 bo, U8 bi, Label label) { emitFormB(0x40000002, bo, bi, 0/*TODO*/); }
void PPCAssembler::bca(U08 bo, U08 bi, U16 bd) { emitFormB(0x40000002, bo, bi, bd); }
void PPCAssembler::bca(U08 bo, U08 bi, Label label) { emitFormB(0x40000002, bo, bi, 0/*TODO*/); }
void PPCAssembler::blta(RegCR cr, Label label) { bca(12, (4 * cr) + 0, label); }
void PPCAssembler::blea(RegCR cr, Label label) { bca( 4, (4 * cr) + 1, label); }
void PPCAssembler::beqa(RegCR cr, Label label) { bca(12, (4 * cr) + 2, label); }
@ -129,8 +129,8 @@ void PPCAssembler::bgea(RegCR cr, Label label) { bca( 4, (4 * cr) + 0, label); }
void PPCAssembler::bgta(RegCR cr, Label label) { bca(12, (4 * cr) + 1, label); }
void PPCAssembler::bnea(RegCR cr, Label label) { bca( 4, (4 * cr) + 2, label); }
void PPCAssembler::bsoa(RegCR cr, Label label) { bca(12, (4 * cr) + 3, label); }
void PPCAssembler::bcl(U8 bo, U8 bi, U16 bd) { emitFormB(0x40000001, bo, bi, bd); }
void PPCAssembler::bcl(U8 bo, U8 bi, Label label) { emitFormB(0x40000001, bo, bi, 0/*TODO*/); }
void PPCAssembler::bcl(U08 bo, U08 bi, U16 bd) { emitFormB(0x40000001, bo, bi, bd); }
void PPCAssembler::bcl(U08 bo, U08 bi, Label label) { emitFormB(0x40000001, bo, bi, 0/*TODO*/); }
void PPCAssembler::bltl(RegCR cr, Label label) { bcl(12, (4 * cr) + 0, label); }
void PPCAssembler::blel(RegCR cr, Label label) { bcl( 4, (4 * cr) + 1, label); }
void PPCAssembler::beql(RegCR cr, Label label) { bcl(12, (4 * cr) + 2, label); }
@ -138,8 +138,8 @@ void PPCAssembler::bgel(RegCR cr, Label label) { bcl( 4, (4 * cr) + 0, label); }
void PPCAssembler::bgtl(RegCR cr, Label label) { bcl(12, (4 * cr) + 1, label); }
void PPCAssembler::bnel(RegCR cr, Label label) { bcl( 4, (4 * cr) + 2, label); }
void PPCAssembler::bsol(RegCR cr, Label label) { bcl(12, (4 * cr) + 3, label); }
void PPCAssembler::bcla(U8 bo, U8 bi, U16 bd) { emitFormB(0x40000003, bo, bi, bd); }
void PPCAssembler::bcla(U8 bo, U8 bi, Label label) { emitFormB(0x40000003, bo, bi, 0/*TODO*/); }
void PPCAssembler::bcla(U08 bo, U08 bi, U16 bd) { emitFormB(0x40000003, bo, bi, bd); }
void PPCAssembler::bcla(U08 bo, U08 bi, Label label) { emitFormB(0x40000003, bo, bi, 0/*TODO*/); }
void PPCAssembler::bltla(RegCR cr, Label label) { bcla(12, (4 * cr) + 0, label); }
void PPCAssembler::blela(RegCR cr, Label label) { bcla( 4, (4 * cr) + 1, label); }
void PPCAssembler::beqla(RegCR cr, Label label) { bcla(12, (4 * cr) + 2, label); }
@ -147,10 +147,10 @@ void PPCAssembler::bgela(RegCR cr, Label label) { bcla( 4, (4 * cr) + 0, label);
void PPCAssembler::bgtla(RegCR cr, Label label) { bcla(12, (4 * cr) + 1, label); }
void PPCAssembler::bnela(RegCR cr, Label label) { bcla( 4, (4 * cr) + 2, label); }
void PPCAssembler::bsola(RegCR cr, Label label) { bcla(12, (4 * cr) + 3, label); }
void PPCAssembler::bcctr(U8 bo, U8 bi, U8 bh, Label label) { emitFormXL(0x4C000420, bo, bi, bh); }
void PPCAssembler::bcctrl(U8 bo, U8 bi, U8 bh, Label label) { emitFormXL(0x4C000421, bo, bi, bh); }
void PPCAssembler::bclr(U8 bo, U8 bi, U8 bh, Label label) { emitFormXL(0x4C000020, bo, bi, bh); }
void PPCAssembler::bclrl(U8 bo, U8 bi, U8 bh, Label label) { emitFormXL(0x4C000021, bo, bi, bh); }
void PPCAssembler::bcctr(U08 bo, U08 bi, U08 bh, Label label) { emitFormXL(0x4C000420, bo, bi, bh); }
void PPCAssembler::bcctrl(U08 bo, U08 bi, U08 bh, Label label) { emitFormXL(0x4C000421, bo, bi, bh); }
void PPCAssembler::bclr(U08 bo, U08 bi, U08 bh, Label label) { emitFormXL(0x4C000020, bo, bi, bh); }
void PPCAssembler::bclrl(U08 bo, U08 bi, U08 bh, Label label) { emitFormXL(0x4C000021, bo, bi, bh); }
void PPCAssembler::cmp(RegCR crfd, RegGPR ra, RegGPR rb) { }
void PPCAssembler::cmp(RegGPR ra, RegGPR rb) { }
void PPCAssembler::cmpd(RegCR crfd, RegGPR ra, RegGPR rb) { }
@ -179,17 +179,17 @@ void PPCAssembler::cntlzd(RegGPR ra, RegGPR rs) { emitFormX(0x7C000074, rs, ra,
void PPCAssembler::cntlzd_(RegGPR ra, RegGPR rs) { emitFormX(0x7C000075, rs, ra, 0); }
void PPCAssembler::cntlzw(RegGPR ra, RegGPR rs) { emitFormX(0x7C000034, rs, ra, 0); }
void PPCAssembler::cntlzw_(RegGPR ra, RegGPR rs) { emitFormX(0x7C000035, rs, ra, 0); }
void PPCAssembler::crand(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000202, crfd, crfa, crfb); }
void PPCAssembler::crandc(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000102, crfd, crfa, crfb); }
void PPCAssembler::creqv(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000242, crfd, crfa, crfb); }
void PPCAssembler::crnand(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C0001C2, crfd, crfa, crfb); }
void PPCAssembler::crnor(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000042, crfd, crfa, crfb); }
void PPCAssembler::cror(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000382, crfd, crfa, crfb); }
void PPCAssembler::crorc(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000342, crfd, crfa, crfb); }
void PPCAssembler::crxor(U8 crfd, U8 crfa, U8 crfb) { emitFormXL(0x4C000182, crfd, crfa, crfb); }
void PPCAssembler::crand(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000202, crfd, crfa, crfb); }
void PPCAssembler::crandc(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000102, crfd, crfa, crfb); }
void PPCAssembler::creqv(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000242, crfd, crfa, crfb); }
void PPCAssembler::crnand(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C0001C2, crfd, crfa, crfb); }
void PPCAssembler::crnor(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000042, crfd, crfa, crfb); }
void PPCAssembler::cror(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000382, crfd, crfa, crfb); }
void PPCAssembler::crorc(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000342, crfd, crfa, crfb); }
void PPCAssembler::crxor(U08 crfd, U08 crfa, U08 crfb) { emitFormXL(0x4C000182, crfd, crfa, crfb); }
void PPCAssembler::dcbf(RegGPR ra, RegGPR rb) { emitFormX(0x7C0000AC, 0, ra, rb); }
void PPCAssembler::dcbst(RegGPR ra, RegGPR rb) { emitFormX(0x7C00006C, 0, ra, rb); }
void PPCAssembler::dcbt(RegGPR ra, RegGPR rb, U8 th) { emitFormX(0x7C00022C, th, ra, rb); }
void PPCAssembler::dcbt(RegGPR ra, RegGPR rb, U08 th) { emitFormX(0x7C00022C, th, ra, rb); }
void PPCAssembler::dcbtst(RegGPR ra, RegGPR rb) { emitFormX(0x7C0001EC, 0, ra, rb); }
void PPCAssembler::dcbz(RegGPR ra, RegGPR rb) { emitFormX(0x7C0007EC, 0, ra, rb); }
void PPCAssembler::divd(RegGPR rd, RegGPR ra, RegGPR rb) { emitFormXO(0x7C0003D2, rd, ra, rb); }
@ -330,7 +330,7 @@ void PPCAssembler::mcrf(RegCR crfd, RegCR crfs) { }
void PPCAssembler::mcrfs(RegCR crfd, RegCR crfs) { }
void PPCAssembler::mffs() { }
void PPCAssembler::mffs_() { }
void PPCAssembler::mfocrf(RegGPR rd, U8 crm) { emitFormXFX(0x7C000026, rd, (0x200 | (crm << 1))); }
void PPCAssembler::mfocrf(RegGPR rd, U08 crm) { emitFormXFX(0x7C000026, rd, (0x200 | (crm << 1))); }
void PPCAssembler::mfcr(RegGPR rd) { emitFormXFX(0x7C000026, rd, 0); }
void PPCAssembler::mfspr(RegGPR rd, U16 spr) { emitFormXFX(0x7C0002A6, rd, ((spr & 0x1F) << 5) | ((spr >> 5) & 0x1F)); }
void PPCAssembler::mfxer(RegGPR rd) { mfspr(rd, 1); }
@ -342,8 +342,8 @@ void PPCAssembler::mtfsb0x() { }
void PPCAssembler::mtfsb1x() { }
void PPCAssembler::mtfsfix() { }
void PPCAssembler::mtfsfx() { }
void PPCAssembler::mtocrf(U8 crm, RegGPR rs) { emitFormXFX(0x7C000120, rs, (0x200 | (crm << 1))); }
void PPCAssembler::mtcrf(U8 crm, RegGPR rs) { emitFormXFX(0x7C000120, rs, (crm << 1)); }
void PPCAssembler::mtocrf(U08 crm, RegGPR rs) { emitFormXFX(0x7C000120, rs, (0x200 | (crm << 1))); }
void PPCAssembler::mtcrf(U08 crm, RegGPR rs) { emitFormXFX(0x7C000120, rs, (crm << 1)); }
void PPCAssembler::mtcr(RegGPR rs) { mtcrf(0xFF, rs); }
void PPCAssembler::mtspr(U16 spr, RegGPR rs) { emitFormXFX(0x7C0003A6, rs, ((spr & 0x1F) << 5) | ((spr >> 5) & 0x1F)); }
void PPCAssembler::mtxer(RegGPR rs) { mtspr(1, rs); }
@ -382,24 +382,24 @@ void PPCAssembler::orc(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000338,
void PPCAssembler::orc_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000339, rs, ra, rb); }
void PPCAssembler::ori(RegGPR ra, RegGPR rs, U16 uimm) { emitFormD(0x60000000, rs, ra, uimm); }
void PPCAssembler::oris(RegGPR ra, RegGPR rs, U16 uimm) { emitFormD(0x64000000, rs, ra, uimm); }
void PPCAssembler::rldcl(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb) { }
void PPCAssembler::rldcl_(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb) { }
void PPCAssembler::rldcr(RegGPR ra, RegGPR rs, RegGPR rb, U8 me) { }
void PPCAssembler::rldcr_(RegGPR ra, RegGPR rs, RegGPR rb, U8 me) { }
void PPCAssembler::rldic(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rldic_(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rldicl(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rldicl_(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rldicr(RegGPR ra, RegGPR rs, U8 sh, U8 me) { }
void PPCAssembler::rldicr_(RegGPR ra, RegGPR rs, U8 sh, U8 me) { }
void PPCAssembler::rldimi(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rldimi_(RegGPR ra, RegGPR rs, U8 sh, U8 mb) { }
void PPCAssembler::rlwimi(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me) { emitFormM(0x50000000, rs, ra, sh, mb, me); }
void PPCAssembler::rlwimi_(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me) { emitFormM(0x50000001, rs, ra, sh, mb, me); }
void PPCAssembler::rlwinm(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me) { emitFormM(0x54000000, rs, ra, sh, mb, me); }
void PPCAssembler::rlwinm_(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me) { emitFormM(0x54000001, rs, ra, sh, mb, me); }
void PPCAssembler::rlwnm(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb, U8 me) { emitFormM(0x5C000000, rs, ra, rb, mb, me); }
void PPCAssembler::rlwnm_(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb, U8 me) { emitFormM(0x5C000001, rs, ra, rb, mb, me); }
void PPCAssembler::rldcl(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb) { }
void PPCAssembler::rldcl_(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb) { }
void PPCAssembler::rldcr(RegGPR ra, RegGPR rs, RegGPR rb, U08 me) { }
void PPCAssembler::rldcr_(RegGPR ra, RegGPR rs, RegGPR rb, U08 me) { }
void PPCAssembler::rldic(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rldic_(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rldicl(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rldicl_(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rldicr(RegGPR ra, RegGPR rs, U08 sh, U08 me) { }
void PPCAssembler::rldicr_(RegGPR ra, RegGPR rs, U08 sh, U08 me) { }
void PPCAssembler::rldimi(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rldimi_(RegGPR ra, RegGPR rs, U08 sh, U08 mb) { }
void PPCAssembler::rlwimi(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me) { emitFormM(0x50000000, rs, ra, sh, mb, me); }
void PPCAssembler::rlwimi_(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me) { emitFormM(0x50000001, rs, ra, sh, mb, me); }
void PPCAssembler::rlwinm(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me) { emitFormM(0x54000000, rs, ra, sh, mb, me); }
void PPCAssembler::rlwinm_(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me) { emitFormM(0x54000001, rs, ra, sh, mb, me); }
void PPCAssembler::rlwnm(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb, U08 me) { emitFormM(0x5C000000, rs, ra, rb, mb, me); }
void PPCAssembler::rlwnm_(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb, U08 me) { emitFormM(0x5C000001, rs, ra, rb, mb, me); }
void PPCAssembler::sc() { }
void PPCAssembler::sld(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000036, rs, ra, rb); }
void PPCAssembler::sld_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000037, rs, ra, rb); }
@ -407,12 +407,12 @@ void PPCAssembler::slw(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000030,
void PPCAssembler::slw_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000031, rs, ra, rb); }
void PPCAssembler::srad(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000634, rs, ra, rb); }
void PPCAssembler::srad_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000635, rs, ra, rb); }
void PPCAssembler::sradi(RegGPR ra, RegGPR rs, U8 sh) { }
void PPCAssembler::sradi_(RegGPR ra, RegGPR rs, U8 sh) { }
void PPCAssembler::sradi(RegGPR ra, RegGPR rs, U08 sh) { }
void PPCAssembler::sradi_(RegGPR ra, RegGPR rs, U08 sh) { }
void PPCAssembler::sraw(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000630, rs, ra, rb); }
void PPCAssembler::sraw_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000631, rs, ra, rb); }
void PPCAssembler::srawi(RegGPR ra, RegGPR rs, U8 sh) { emitFormX(0x7C000670, rs, ra, sh); }
void PPCAssembler::srawi_(RegGPR ra, RegGPR rs, U8 sh) { emitFormX(0x7C000671, rs, ra, sh); }
void PPCAssembler::srawi(RegGPR ra, RegGPR rs, U08 sh) { emitFormX(0x7C000670, rs, ra, sh); }
void PPCAssembler::srawi_(RegGPR ra, RegGPR rs, U08 sh) { emitFormX(0x7C000671, rs, ra, sh); }
void PPCAssembler::srd(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000436, rs, ra, rb); }
void PPCAssembler::srd_(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000437, rs, ra, rb); }
void PPCAssembler::srw(RegGPR ra, RegGPR rs, RegGPR rb) { emitFormX(0x7C000430, rs, ra, rb); }
@ -470,7 +470,7 @@ void PPCAssembler::subfze(RegGPR rd, RegGPR ra) { emitFormXO(0x7C000190, rd, ra,
void PPCAssembler::subfze_(RegGPR rd, RegGPR ra) { emitFormXO(0x7C000191, rd, ra, 0); }
void PPCAssembler::subfzeo(RegGPR rd, RegGPR ra) { emitFormXO(0x7C000590, rd, ra, 0); }
void PPCAssembler::subfzeo_(RegGPR rd, RegGPR ra) { emitFormXO(0x7C000591, rd, ra, 0); }
void PPCAssembler::sync(U8 l) { emitFormX(0x7C0004AC, l, 0, 0); }
void PPCAssembler::sync(U08 l) { emitFormX(0x7C0004AC, l, 0, 0); }
void PPCAssembler::td() { }
void PPCAssembler::tdi() { }
void PPCAssembler::tw() { }

94
nucleus/cpu/backend/ppc/ppc_assembler.h
View file

@ -100,8 +100,8 @@ public:
void ba(Label label);
void bl(Label label);
void bla(Label label);
void bc(U8 bo, U8 bi, U16 bd);
void bc(U8 bo, U8 bi, Label label);
void bc(U08 bo, U08 bi, U16 bd);
void bc(U08 bo, U08 bi, Label label);
void blt(RegCR cr, Label label);
void ble(RegCR cr, Label label);
void beq(RegCR cr, Label label);
@ -109,8 +109,8 @@ public:
void bgt(RegCR cr, Label label);
void bne(RegCR cr, Label label);
void bso(RegCR cr, Label label);
void bca(U8 bo, U8 bi, U16 bd);
void bca(U8 bo, U8 bi, Label label);
void bca(U08 bo, U08 bi, U16 bd);
void bca(U08 bo, U08 bi, Label label);
void blta(RegCR cr, Label label);
void blea(RegCR cr, Label label);
void beqa(RegCR cr, Label label);
@ -118,8 +118,8 @@ public:
void bgta(RegCR cr, Label label);
void bnea(RegCR cr, Label label);
void bsoa(RegCR cr, Label label);
void bcl(U8 bo, U8 bi, U16 bd);
void bcl(U8 bo, U8 bi, Label label);
void bcl(U08 bo, U08 bi, U16 bd);
void bcl(U08 bo, U08 bi, Label label);
void bltl(RegCR cr, Label label);
void blel(RegCR cr, Label label);
void beql(RegCR cr, Label label);
@ -127,8 +127,8 @@ public:
void bgtl(RegCR cr, Label label);
void bnel(RegCR cr, Label label);
void bsol(RegCR cr, Label label);
void bcla(U8 bo, U8 bi, U16 bd);
void bcla(U8 bo, U8 bi, Label label);
void bcla(U08 bo, U08 bi, U16 bd);
void bcla(U08 bo, U08 bi, Label label);
void bltla(RegCR cr, Label label);
void blela(RegCR cr, Label label);
void beqla(RegCR cr, Label label);
@ -136,10 +136,10 @@ public:
void bgtla(RegCR cr, Label label);
void bnela(RegCR cr, Label label);
void bsola(RegCR cr, Label label);
void bcctr(U8 bo, U8 bi, U8 bh, Label label);
void bcctrl(U8 bo, U8 bi, U8 bh, Label label);
void bclr(U8 bo, U8 bi, U8 bh, Label label);
void bclrl(U8 bo, U8 bi, U8 bh, Label label);
void bcctr(U08 bo, U08 bi, U08 bh, Label label);
void bcctrl(U08 bo, U08 bi, U08 bh, Label label);
void bclr(U08 bo, U08 bi, U08 bh, Label label);
void bclrl(U08 bo, U08 bi, U08 bh, Label label);
void cmp(RegCR crfd, RegGPR ra, RegGPR rb);
void cmp(RegGPR ra, RegGPR rb);
void cmpd(RegCR crfd, RegGPR ra, RegGPR rb);
@ -168,17 +168,17 @@ public:
void cntlzd_(RegGPR ra, RegGPR rs);
void cntlzw(RegGPR ra, RegGPR rs);
void cntlzw_(RegGPR ra, RegGPR rs);
void crand(U8 crfd, U8 crfa, U8 crfb);
void crandc(U8 crfd, U8 crfa, U8 crfb);
void creqv(U8 crfd, U8 crfa, U8 crfb);
void crnand(U8 crfd, U8 crfa, U8 crfb);
void crnor(U8 crfd, U8 crfa, U8 crfb);
void cror(U8 crfd, U8 crfa, U8 crfb);
void crorc(U8 crfd, U8 crfa, U8 crfb);
void crxor(U8 crfd, U8 crfa, U8 crfb);
void crand(U08 crfd, U08 crfa, U08 crfb);
void crandc(U08 crfd, U08 crfa, U08 crfb);
void creqv(U08 crfd, U08 crfa, U08 crfb);
void crnand(U08 crfd, U08 crfa, U08 crfb);
void crnor(U08 crfd, U08 crfa, U08 crfb);
void cror(U08 crfd, U08 crfa, U08 crfb);
void crorc(U08 crfd, U08 crfa, U08 crfb);
void crxor(U08 crfd, U08 crfa, U08 crfb);
void dcbf(RegGPR ra, RegGPR rb);
void dcbst(RegGPR ra, RegGPR rb);
void dcbt(RegGPR ra, RegGPR rb, U8 th);
void dcbt(RegGPR ra, RegGPR rb, U08 th);
void dcbtst(RegGPR ra, RegGPR rb);
void dcbz(RegGPR ra, RegGPR rb);
void divd(RegGPR rd, RegGPR ra, RegGPR rb);
@ -319,7 +319,7 @@ public:
void mcrfs(RegCR crfd, RegCR crfs);
void mffs(); // TODO
void mffs_(); // TODO
void mfocrf(RegGPR rd, U8 crm);
void mfocrf(RegGPR rd, U08 crm);
void mfcr(RegGPR rd);
void mfspr(RegGPR rd, U16 spr);
void mfxer(RegGPR rd);
@ -331,8 +331,8 @@ public:
void mtfsb1x(); // TODO
void mtfsfix(); // TODO
void mtfsfx(); // TODO
void mtocrf(U8 crm, RegGPR rs);
void mtcrf(U8 crm, RegGPR rs);
void mtocrf(U08 crm, RegGPR rs);
void mtcrf(U08 crm, RegGPR rs);
void mtcr(RegGPR rs);
void mtspr(U16 spr, RegGPR rs);
void mtxer(RegGPR rs);
@ -371,24 +371,24 @@ public:
void orc_(RegGPR ra, RegGPR rs, RegGPR rb);
void ori(RegGPR ra, RegGPR rs, U16 uimm);
void oris(RegGPR ra, RegGPR rs, U16 uimm);
void rldcl(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb);
void rldcl_(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb);
void rldcr(RegGPR ra, RegGPR rs, RegGPR rb, U8 me);
void rldcr_(RegGPR ra, RegGPR rs, RegGPR rb, U8 me);
void rldic(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rldic_(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rldicl(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rldicl_(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rldicr(RegGPR ra, RegGPR rs, U8 sh, U8 me);
void rldicr_(RegGPR ra, RegGPR rs, U8 sh, U8 me);
void rldimi(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rldimi_(RegGPR ra, RegGPR rs, U8 sh, U8 mb);
void rlwimi(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me);
void rlwimi_(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me);
void rlwinm(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me);
void rlwinm_(RegGPR ra, RegGPR rs, U8 sh, U8 mb, U8 me);
void rlwnm(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb, U8 me);
void rlwnm_(RegGPR ra, RegGPR rs, RegGPR rb, U8 mb, U8 me);
void rldcl(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb);
void rldcl_(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb);
void rldcr(RegGPR ra, RegGPR rs, RegGPR rb, U08 me);
void rldcr_(RegGPR ra, RegGPR rs, RegGPR rb, U08 me);
void rldic(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rldic_(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rldicl(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rldicl_(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rldicr(RegGPR ra, RegGPR rs, U08 sh, U08 me);
void rldicr_(RegGPR ra, RegGPR rs, U08 sh, U08 me);
void rldimi(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rldimi_(RegGPR ra, RegGPR rs, U08 sh, U08 mb);
void rlwimi(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me);
void rlwimi_(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me);
void rlwinm(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me);
void rlwinm_(RegGPR ra, RegGPR rs, U08 sh, U08 mb, U08 me);
void rlwnm(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb, U08 me);
void rlwnm_(RegGPR ra, RegGPR rs, RegGPR rb, U08 mb, U08 me);
void sc();
void sld(RegGPR ra, RegGPR rs, RegGPR rb);
void sld_(RegGPR ra, RegGPR rs, RegGPR rb);
@ -396,12 +396,12 @@ public:
void slw_(RegGPR ra, RegGPR rs, RegGPR rb);
void srad(RegGPR ra, RegGPR rs, RegGPR rb);
void srad_(RegGPR ra, RegGPR rs, RegGPR rb);
void sradi(RegGPR ra, RegGPR rs, U8 sh);
void sradi_(RegGPR ra, RegGPR rs, U8 sh);
void sradi(RegGPR ra, RegGPR rs, U08 sh);
void sradi_(RegGPR ra, RegGPR rs, U08 sh);
void sraw(RegGPR ra, RegGPR rs, RegGPR rb);
void sraw_(RegGPR ra, RegGPR rs, RegGPR rb);
void srawi(RegGPR ra, RegGPR rs, U8 sh);
void srawi_(RegGPR ra, RegGPR rs, U8 sh);
void srawi(RegGPR ra, RegGPR rs, U08 sh);
void srawi_(RegGPR ra, RegGPR rs, U08 sh);
void srd(RegGPR ra, RegGPR rs, RegGPR rb);
void srd_(RegGPR ra, RegGPR rs, RegGPR rb);
void srw(RegGPR ra, RegGPR rs, RegGPR rb);
@ -459,7 +459,7 @@ public:
void subfze_(RegGPR rd, RegGPR ra);
void subfzeo(RegGPR rd, RegGPR ra);
void subfzeo_(RegGPR rd, RegGPR ra);
void sync(U8 l);
void sync(U08 l);
void td(); // TODO
void tdi(); // TODO
void tw(); // TODO

6
nucleus/cpu/backend/sequences.h
View file

@ -150,9 +150,9 @@ public:
};
template <typename RegType>
struct I8OpBase : ValueOp<I8OpBase<RegType>, RegType, S8, hir::TYPE_I8> {
using Base = ValueOp<I8OpBase<RegType>, RegType, S8, hir::TYPE_I8>;
const S8 constant() const {
struct I8OpBase : ValueOp<I8OpBase<RegType>, RegType, S08, hir::TYPE_I8> {
using Base = ValueOp<I8OpBase<RegType>, RegType, S08, hir::TYPE_I8>;
const S08 constant() const {
return Base::value->constant.i8;
}
};

2
nucleus/cpu/backend/x86/x86_constants.h
View file

@ -30,7 +30,7 @@ namespace x86 {
* @param[in] dest Destination GPR register
* @param[in] constant Integer constant
*/
void getReg8Constant(X86Emitter& e, Xbyak::Reg8 dest, const S8 constant);
void getReg8Constant(X86Emitter& e, Xbyak::Reg8 dest, const S08 constant);
void getReg16Constant(X86Emitter& e, Xbyak::Reg16 dest, const S16 constant);
void getReg32Constant(X86Emitter& e, Xbyak::Reg32 dest, const S32 constant);
void getReg64Constant(X86Emitter& e, Xbyak::Reg64 dest, const S64 constant);

2
nucleus/cpu/frontend/ppu/analyzer/ppu_analyzer.cpp
View file

@ -11,7 +11,7 @@ namespace ppu {
void Analyzer::setFlag(AnalyzerEvent& reg, AnalyzerEvent evt)
{
auto& regValue = (U8&)reg;
auto& regValue = (U08&)reg;
if (regValue == REG_NONE && evt == REG_READ) {
regValue |= REG_READ_ORIG;
}

2
nucleus/cpu/frontend/ppu/analyzer/ppu_analyzer.h
View file

@ -19,7 +19,7 @@ namespace ppu {
#undef REG_NONE
#endif
enum AnalyzerEvent : U8 {
enum AnalyzerEvent : U08 {
REG_NONE = 0, // Register was not accessed
REG_READ = (1 << 0), // Register was read
REG_WRITE = (1 << 1), // Register was written

4
nucleus/cpu/frontend/ppu/analyzer/ppu_analyzer_memory.cpp
View file

@ -218,7 +218,7 @@ void Analyzer::lmw(Instruction code)
void Analyzer::lswi(Instruction code)
{
setFlag(gpr[code.ra], REG_READ);
U8 reg = code.rd;
U08 reg = code.rd;
U64 n = code.nb ? code.nb : 32;
while (n > 0) {
setFlag(gpr[reg], REG_WRITE);
@ -473,7 +473,7 @@ void Analyzer::stswi(Instruction code)
{
setFlag(gpr[code.ra], REG_READ);
U64 n = code.nb ? code.nb : 32;
U8 reg = code.rd;
U08 reg = code.rd;
while (n > 0) {
setFlag(gpr[reg], REG_READ);
n = (n > 3) ? (n - 4) : 0;

12
nucleus/cpu/frontend/ppu/ppu_instruction.cpp
View file

@ -37,8 +37,8 @@ bool Instruction::is_branch_conditional() const
}
// If instruction is {bclr*} with conditions
if (opcode == 0x13 && op19 == 0x010) {
const U8 bo0 = (bo & 0x10);
const U8 bo2 = (bo & 0x04);
const U08 bo0 = (bo & 0x10);
const U08 bo2 = (bo & 0x04);
if (!bo0 || !bo2) {
return true;
}
@ -78,8 +78,8 @@ bool Instruction::is_return() const
// If instruction is {bclr*}
if (opcode == 0x13 && op19 == 0x010) {
// Discard conditional return
const U8 bo0 = (bo & 0x10);
const U8 bo2 = (bo & 0x04);
const U08 bo0 = (bo & 0x10);
const U08 bo2 = (bo & 0x04);
if (!bo0 || !bo2) {
return false;
}
@ -106,8 +106,8 @@ U32 Instruction::get_target(U32 currentAddr) const
}
// If instruction is {bclr*} with conditions
if (opcode == 0x13 && op19 == 0x010) {
const U8 bo0 = (bo & 0x10);
const U8 bo2 = (bo & 0x04);
const U08 bo0 = (bo & 0x10);
const U08 bo2 = (bo & 0x04);
if (!bo0 || !bo2) {
return currentAddr + 4;
}

36
nucleus/cpu/frontend/ppu/ppu_state.h
View file

@ -73,11 +73,11 @@ union PPU_CR {
CR_SO = 3,
};
U8 getBit(U32 bit) { return (CR >> bit) & 1; }
U08 getBit(U32 bit) { return (CR >> bit) & 1; }
void setBit(U32 bit, bool value) { CR = value ? CR | (1 << bit) : CR & ~(1 << bit); }
U8 getField(U32 field) { return (CR >> field*4) & 0xf; }
void setField(U32 field, U8 value) {
U08 getField(U32 field) { return (CR >> field*4) & 0xf; }
void setField(U32 field, U08 value) {
U64 maskHigh = ~((1ULL << (field+1)*4)-1);
U64 maskLow = ((1ULL << field*4)-1);
CR = (CR & (U32)maskHigh) | (value << field*4) | (CR & (U32)maskLow);
@ -201,8 +201,8 @@ union PPU_VR {
S32 s32[4];
U16 u16[8];
S16 s16[8];
U8 u8[16];
U8 s8[16];
U08 u8[16];
U08 s8[16];
F32 f32[4];
F64 f64[2];
@ -245,18 +245,18 @@ public:
struct CR {
union Field {
struct {
U8 lt; // Negative (Bit 0)
U8 gt; // Positive (Bit 1)
U8 eq; // Zero (Bit 2)
U8 so; // Summary overflow (Bit 3)
U08 lt; // Negative (Bit 0)
U08 gt; // Positive (Bit 1)
U08 eq; // Zero (Bit 2)
U08 so; // Summary overflow (Bit 3)
};
struct {
U8 fx; // Floating-point exception summary (Bit 0)
U8 fex; // Floating-point enabled exception summary (Bit 1)
U8 vx; // Floating-point invalid operation exception summary (Bit 2)
U8 ox; // Floating-point overflow exception (Bit 3)
U08 fx; // Floating-point exception summary (Bit 0)
U08 fex; // Floating-point enabled exception summary (Bit 1)
U08 vx; // Floating-point invalid operation exception summary (Bit 2)
U08 ox; // Floating-point overflow exception (Bit 3)
};
U8 bit[4];
U08 bit[4];
} field[8];
} cr;
@ -272,10 +272,10 @@ public:
* 0 31 32 33 34 35 56 57 63
*/
struct XER {
U8 so; // Summary overflow (1-bit)
U8 ov; // Overflow (1-bit)
U8 ca; // Carry (1-bit)
U8 bc; // Byte count (7-bits)
U08 so; // Summary overflow (1-bit)
U08 ov; // Overflow (1-bit)
U08 ca; // Carry (1-bit)
U08 bc; // Byte count (7-bits)
} xer;
PPU_LR lr;

24
nucleus/cpu/frontend/ppu/recompiler/ppu_recompiler.cpp
View file

@ -132,13 +132,13 @@ Value* Recompiler::getCRField(int index) {
// TODO: Use volatility information?
Value* field = builder.createShl(builder.createCtxLoad(
offsetof(PPUState, cr.field[index].bit[0]), TYPE_I8), U8(3));
offsetof(PPUState, cr.field[index].bit[0]), TYPE_I8), U08(3));
field = builder.createOr(field, builder.createShl(builder.createCtxLoad(
offsetof(PPUState, cr.field[index].bit[1]), TYPE_I8), U8(2)));
offsetof(PPUState, cr.field[index].bit[1]), TYPE_I8), U08(2)));
field = builder.createOr(field, builder.createShl(builder.createCtxLoad(
offsetof(PPUState, cr.field[index].bit[2]), TYPE_I8), U8(1)));
offsetof(PPUState, cr.field[index].bit[2]), TYPE_I8), U08(1)));
field = builder.createOr(field, builder.createShl(builder.createCtxLoad(
offsetof(PPUState, cr.field[index].bit[3]), TYPE_I8), U8(0)));
offsetof(PPUState, cr.field[index].bit[3]), TYPE_I8), U08(0)));
return field;
}
@ -167,10 +167,10 @@ Value* Recompiler::getLR() {
Value* Recompiler::getXER() {
Value* xer = builder.getConstantI64(0);
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_SO(), TYPE_I64), U8(31)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_OV(), TYPE_I64), U8(30)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_CA(), TYPE_I64), U8(29)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_BC(), TYPE_I64), U8(0)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_SO(), TYPE_I64), U08(31)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_OV(), TYPE_I64), U08(30)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_CA(), TYPE_I64), U08(29)));
xer = builder.createOr(xer, builder.createShl(builder.createZExt(getXER_BC(), TYPE_I64), U08(0)));
return xer;
}
@ -254,13 +254,13 @@ void Recompiler::setCRField(int index, Value* value) {
// Unpack and store the value bits
case TYPE_I8:
builder.createCtxStore(offsetof(PPUState, cr.field[index].bit[0]),
builder.createAnd(builder.createShr(value, U8(3)), builder.getConstantI8(1)));
builder.createAnd(builder.createShr(value, U08(3)), builder.getConstantI8(1)));
builder.createCtxStore(offsetof(PPUState, cr.field[index].bit[1]),
builder.createAnd(builder.createShr(value, U8(2)), builder.getConstantI8(1)));
builder.createAnd(builder.createShr(value, U08(2)), builder.getConstantI8(1)));
builder.createCtxStore(offsetof(PPUState, cr.field[index].bit[2]),
builder.createAnd(builder.createShr(value, U8(1)), builder.getConstantI8(1)));
builder.createAnd(builder.createShr(value, U08(1)), builder.getConstantI8(1)));
builder.createCtxStore(offsetof(PPUState, cr.field[index].bit[3]),
builder.createAnd(builder.createShr(value, U8(0)), builder.getConstantI8(1)));
builder.createAnd(builder.createShr(value, U08(0)), builder.getConstantI8(1)));
break;
// Store the unpacked value directly

16
nucleus/cpu/frontend/ppu/recompiler/ppu_recompiler_branch.cpp
View file

@ -45,10 +45,10 @@ void Recompiler::bcx(Instruction code)
const U32 nextAddr = (currentAddress + 4) & ~0x3;
// Check condition
const U8 bo0 = (code.bo & 0x10) ? 1 : 0;
const U8 bo1 = (code.bo & 0x08) ? 1 : 0;
const U8 bo2 = (code.bo & 0x04) ? 1 : 0;
const U8 bo3 = (code.bo & 0x02) ? 1 : 0;
const U08 bo0 = (code.bo & 0x10) ? 1 : 0;
const U08 bo1 = (code.bo & 0x08) ? 1 : 0;
const U08 bo2 = (code.bo & 0x04) ? 1 : 0;
const U08 bo3 = (code.bo & 0x02) ? 1 : 0;
Value* ctr_ok = nullptr;
if (!bo2) {
@ -142,10 +142,10 @@ void Recompiler::bcctrx(Instruction code)
void Recompiler::bclrx(Instruction code)
{
// Check condition
const U8 bo0 = (code.bo & 0x10) ? 1 : 0;
const U8 bo1 = (code.bo & 0x08) ? 1 : 0;
const U8 bo2 = (code.bo & 0x04) ? 1 : 0;
const U8 bo3 = (code.bo & 0x02) ? 1 : 0;
const U08 bo0 = (code.bo & 0x10) ? 1 : 0;
const U08 bo1 = (code.bo & 0x08) ? 1 : 0;
const U08 bo2 = (code.bo & 0x04) ? 1 : 0;
const U08 bo3 = (code.bo & 0x02) ? 1 : 0;
Value* ctr_ok = nullptr;
if (!bo2) {

8
nucleus/cpu/hir/builder.h
View file

@ -36,7 +36,7 @@ public:
Value* cloneValue(Value* source);
// HIR constants
Value* getConstantI8(U8 c);
Value* getConstantI8(U08 c);
Value* getConstantI16(U16 c);
Value* getConstantI32(U32 c);
Value* getConstantI64(U64 c);
@ -81,11 +81,11 @@ public:
// Shifting operations
Value* createShl(Value* value, Value* amount);
Value* createShl(Value* value, U8 rhs);
Value* createShl(Value* value, U08 rhs);
Value* createShr(Value* value, Value* amount);
Value* createShr(Value* value, U8 rhs);
Value* createShr(Value* value, U08 rhs);
Value* createShrA(Value* value, Value* amount);
Value* createShrA(Value* value, U8 rhs);
Value* createShrA(Value* value, U08 rhs);
// Memory access and context operations
Value* createLoad(Value* address, Type type, MemoryFlags flags = ENDIAN_DEFAULT);

8
nucleus/cpu/hir/cpu_builder.cpp
View file

@ -64,7 +64,7 @@ Value* Builder::cloneValue(Value* source) {
}
// HIR constants
Value* Builder::getConstantI8(U8 c) {
Value* Builder::getConstantI8(U08 c) {
Value* value = allocValue(TYPE_I8);
value->setConstantI8(c);
return value;
@ -466,7 +466,7 @@ Value* Builder::createShl(Value* value, Value* amount) {
return i->dest;
}
Value* Builder::createShl(Value* value, U8 rhs) {
Value* Builder::createShl(Value* value, U08 rhs) {
return createShl(value, getConstantI8(rhs));
}
@ -492,7 +492,7 @@ Value* Builder::createShr(Value* value, Value* amount) {
return i->dest;
}
Value* Builder::createShr(Value* value, U8 rhs) {
Value* Builder::createShr(Value* value, U08 rhs) {
return createShr(value, getConstantI8(rhs));
}
@ -518,7 +518,7 @@ Value* Builder::createShrA(Value* value, Value* amount) {
return i->dest;
}
Value* Builder::createShrA(Value* value, U8 rhs) {
Value* Builder::createShrA(Value* value, U08 rhs) {
return createShrA(value, getConstantI8(rhs));
}

2
nucleus/cpu/hir/cpu_instruction.cpp
View file

@ -14,7 +14,7 @@
namespace cpu {
namespace hir {
std::string Instruction::Operand::dump(U8 sigType) const {
std::string Instruction::Operand::dump(U08 sigType) const {
std::string output;
if (sigType == OPCODE_SIG_TYPE_V || (sigType == OPCODE_SIG_TYPE_M && value != nullptr)) {
if (value->isConstant()) {

2
nucleus/cpu/hir/instruction.h
View file

@ -48,7 +48,7 @@ public:
* @param[in] sigType Signature type of this HIR operand
* @return String containing the readable version of this HIR operand
*/
std::string dump(U8 sigType) const;
std::string dump(U08 sigType) const;
};
Opcode opcode;

10
nucleus/cpu/hir/opcodes.h
View file

@ -10,7 +10,7 @@
namespace cpu {
namespace hir {
using OpcodeFlags = U8;
using OpcodeFlags = U08;
enum ArithmeticFlags : OpcodeFlags {
ARITHMETIC_SIGNED = 0 << 0,
@ -93,16 +93,16 @@ struct OpcodeInfo {
OpcodeFlags flags;
OpcodeSignature signature;
U8 getSignatureDest() const {
U08 getSignatureDest() const {
return ((signature >> 0) & 0b111);
}
U8 getSignatureSrc1() const {
U08 getSignatureSrc1() const {
return ((signature >> 3) & 0b111);
}
U8 getSignatureSrc2() const {
U08 getSignatureSrc2() const {
return ((signature >> 6) & 0b111);
}
U8 getSignatureSrc3() const {
U08 getSignatureSrc3() const {
return ((signature >> 9) & 0b111);
}
};

26
nucleus/cpu/hir/value.cpp
View file

@ -104,7 +104,7 @@ bool Value::isConstantZero() const {
}
// Constants setters
void Value::setConstantI8(U8 c) {
void Value::setConstantI8(U08 c) {
constant.i8 = c;
type = TYPE_I8;
flags |= VALUE_IS_CONSTANT;
@ -180,7 +180,7 @@ void Value::doMul(Value* rhs, ArithmeticFlags flags) {
}
} else {
switch (type) {
case TYPE_I8: constant.i8 *= U8(rhs->constant.i8); break;
case TYPE_I8: constant.i8 *= U08(rhs->constant.i8); break;
case TYPE_I16: constant.i16 *= U16(rhs->constant.i16); break;
case TYPE_I32: constant.i32 *= U32(rhs->constant.i32); break;
case TYPE_I64: constant.i64 *= U64(rhs->constant.i64); break;
@ -205,7 +205,7 @@ void Value::doDiv(Value* rhs, ArithmeticFlags flags) {
}
} else {
switch (type) {
case TYPE_I8: constant.i8 /= U8(rhs->constant.i8); break;
case TYPE_I8: constant.i8 /= U08(rhs->constant.i8); break;
case TYPE_I16: constant.i16 /= U16(rhs->constant.i16); break;
case TYPE_I32: constant.i32 /= U32(rhs->constant.i32); break;
case TYPE_I64: constant.i64 /= U64(rhs->constant.i64); break;
@ -283,7 +283,7 @@ void Value::doShl(Value* amount) {
void Value::doShr(Value* amount) {
switch (type) {
case TYPE_I8: constant.i8 = U8(constant.i8) >> amount->constant.i8; break;
case TYPE_I8: constant.i8 = U08(constant.i8) >> amount->constant.i8; break;
case TYPE_I16: constant.i16 = U16(constant.i16) >> amount->constant.i8; break;
case TYPE_I32: constant.i32 = U32(constant.i32) >> amount->constant.i8; break;
case TYPE_I64: constant.i64 = U64(constant.i64) >> amount->constant.i8; break;
@ -294,7 +294,7 @@ void Value::doShr(Value* amount) {
void Value::doShrA(Value* amount) {
switch (type) {
case TYPE_I8: constant.i8 = S8(constant.i8) >> amount->constant.i8; break;
case TYPE_I8: constant.i8 = S08(constant.i8) >> amount->constant.i8; break;
case TYPE_I16: constant.i16 = S16(constant.i16) >> amount->constant.i8; break;
case TYPE_I32: constant.i32 = S32(constant.i32) >> amount->constant.i8; break;
case TYPE_I64: constant.i64 = S64(constant.i64) >> amount->constant.i8; break;
@ -390,7 +390,7 @@ void Value::doConvert(Type newType) {
case TYPE_I32:
type = newType;
switch (newType) {
case TYPE_I8: constant.i8 = S8(constant.i32); return;
case TYPE_I8: constant.i8 = S08(constant.i32); return;
case TYPE_I16: constant.i16 = S16(constant.i32); return;
case TYPE_I32: constant.i32 = S32(constant.i32); return;
case TYPE_I64: constant.i64 = S64(constant.i32); return;
@ -403,7 +403,7 @@ void Value::doConvert(Type newType) {
case TYPE_I64:
type = newType;
switch (newType) {
case TYPE_I8: constant.i8 = S8(constant.i64); return;
case TYPE_I8: constant.i8 = S08(constant.i64); return;
case TYPE_I16: constant.i16 = S16(constant.i64); return;
case TYPE_I32: constant.i32 = S32(constant.i64); return;
case TYPE_I64: constant.i64 = S64(constant.i64); return;
@ -416,7 +416,7 @@ void Value::doConvert(Type newType) {
case TYPE_F32:
type = newType;
switch (newType) {
case TYPE_I8: constant.i8 = S8(constant.f32); return;
case TYPE_I8: constant.i8 = S08(constant.f32); return;
case TYPE_I16: constant.i16 = S16(constant.f32); return;
case TYPE_I32: constant.i32 = S32(constant.f32); return;
case TYPE_I64: constant.i64 = S64(constant.f32); return;
@ -429,7 +429,7 @@ void Value::doConvert(Type newType) {
case TYPE_F64:
type = newType;
switch (newType) {
case TYPE_I8: constant.i8 = S8(constant.f64); return;
case TYPE_I8: constant.i8 = S08(constant.f64); return;
case TYPE_I16: constant.i16 = S16(constant.f64); return;
case TYPE_I32: constant.i32 = S32(constant.f64); return;
case TYPE_I64: constant.i64 = S64(constant.f64); return;
@ -455,10 +455,10 @@ void Value::doCompare(Value* rhs, CompareFlags flags) {
case COMPARE_SLE: constant.i8 = (constant.i8 <= rhs->constant.i8) ? 1 : 0; break;
case COMPARE_SGE: constant.i8 = (constant.i8 >= rhs->constant.i8) ? 1 : 0; break;
case COMPARE_SGT: constant.i8 = (constant.i8 > rhs->constant.i8) ? 1 : 0; break;
case COMPARE_ULT: constant.i8 = (U8(constant.i8) < U8(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_ULE: constant.i8 = (U8(constant.i8) <= U8(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_UGE: constant.i8 = (U8(constant.i8) >= U8(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_UGT: constant.i8 = (U8(constant.i8) > U8(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_ULT: constant.i8 = (U08(constant.i8) < U08(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_ULE: constant.i8 = (U08(constant.i8) <= U08(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_UGE: constant.i8 = (U08(constant.i8) >= U08(rhs->constant.i8)) ? 1 : 0; break;
case COMPARE_UGT: constant.i8 = (U08(constant.i8) > U08(rhs->constant.i8)) ? 1 : 0; break;
}
break;

4
nucleus/cpu/hir/value.h
View file

@ -35,7 +35,7 @@ public:
} parent;
union Constant {
S8 i8;
S08 i8;
S16 i16;
S32 i32;
S64 i64;
@ -73,7 +73,7 @@ public:
bool isConstantEqual(Constant other) const;
// Constants setters
void setConstantI8(U8 c);
void setConstantI8(U08 c);
void setConstantI16(U16 c);
void setConstantI32(U32 c);
void setConstantI64(U64 c);

2
nucleus/endianness.h
View file

@ -30,7 +30,7 @@ using NativeEndian = T;
* Swapped endianness
*/
template <typename T, int size = sizeof(T)> struct se_t;
template <typename T> struct se_t<T, 1> { static inline void func(T& dst, const T src) { (U8&)dst = (U8&)src; } };
template <typename T> struct se_t<T, 1> { static inline void func(T& dst, const T src) { (U08&)dst = (U08&)src; } };
template <typename T> struct se_t<T, 2> { static inline void func(T& dst, const T src) { (U16&)dst = SE16((U16&)src); } };
template <typename T> struct se_t<T, 4> { static inline void func(T& dst, const T src) { (U32&)dst = SE32((U32&)src); } };
template <typename T> struct se_t<T, 8> { static inline void func(T& dst, const T src) { (U64&)dst = SE64((U64&)src); } };

2
nucleus/fmt.cpp
View file

@ -14,7 +14,7 @@ U64 hexToNumber(const char* hex) {
void hexToBytes(const char* hex, char* dst) {
for (size_t i = 0; hex[i] != 0; i++) {
const U8 value = (hex[i] < 0x3A) ? (hex[i] - 0x30) : (hex[i] - 0x37);
const U08 value = (hex[i] < 0x3A) ? (hex[i] - 0x30) : (hex[i] - 0x37);
dst[i/2] |= ((i % 2) == 0) ? (value << 4) : (value);
}
}

8
nucleus/gpu/rsx/rsx.h
View file

@ -21,7 +21,7 @@ struct rsx_device_t {
// LPAR DMA Control
struct rsx_dma_control_t {
U8 reserved[0x40];
U08 reserved[0x40];
BE<U32> put;
BE<U32> get;
BE<U32> ref;
@ -37,7 +37,7 @@ struct rsx_driver_info_t {
BE<U32> hardware_channel;
BE<U32> nvcore_frequency;
BE<U32> memory_frequency;
U8 unk1[0x10C0 - 6*4];
U08 unk1[0x10C0 - 6*4];
struct head_t {
BE<U32> flip;
BE<U32> unk0[4];
@ -119,7 +119,7 @@ public:
// Display buffers stored as textures
rsx_display_info_t display[8];
U8 queued_display = 0;
U08 queued_display = 0;
std::shared_ptr<mem::Memory> memory;
@ -134,7 +134,7 @@ public:
U32 io_read32(U32 offset);
U32 io_read64(U64 offset);
void io_write32(U8 offset, U8 value);
void io_write32(U08 offset, U08 value);
void io_write32(U16 offset, U16 value);
void io_write32(U32 offset, U32 value);
void io_write32(U64 offset, U64 value);

2
nucleus/gpu/rsx/rsx_convert.cpp
View file

@ -215,7 +215,7 @@ gfx::Format convertFormat(TextureFormat format) {
}
}
gfx::Format convertVertexFormat(VertexType type, U8 size) {
gfx::Format convertVertexFormat(VertexType type, U08 size) {
switch (type) {
case RSX_VERTEX_S1:
switch (size) {

2
nucleus/gpu/rsx/rsx_convert.h
View file

@ -25,7 +25,7 @@ gfx::StencilOp convertStencilOp(StencilOp op);
gfx::Format convertFormat(Surface::ColorFormat format);
gfx::Format convertFormat(Surface::DepthStencilFormat format);
gfx::Format convertFormat(TextureFormat format);
gfx::Format convertVertexFormat(VertexType type, U8 size);
gfx::Format convertVertexFormat(VertexType type, U08 size);
} // namespace rsx
} // namespace gpu

4
nucleus/gpu/rsx/rsx_dma.cpp
View file

@ -30,7 +30,7 @@ DMAObject dma_address(U32 dma_object)
}
}
U8 dma_read8(U32 dma_object, U32 offset)
U08 dma_read8(U32 dma_object, U32 offset)
{
const DMAObject& dma = dma_address(dma_object);
@ -78,7 +78,7 @@ U64 dma_read64(U32 dma_object, U32 offset)
return 0;
}
void dma_write8(U32 dma_object, U32 offset, U8 value)
void dma_write8(U32 dma_object, U32 offset, U08 value)
{
const DMAObject& dma = dma_address(dma_object);

4
nucleus/gpu/rsx/rsx_dma.h
View file

@ -50,12 +50,12 @@ struct DMAObject {
// RSX Direct Memory Access
DMAObject dma_address(U32 dma_object);
U8 dma_read8(U32 dma_object, U32 offset);
U08 dma_read8(U32 dma_object, U32 offset);
U16 dma_read16(U32 dma_object, U32 offset);
U32 dma_read32(U32 dma_object, U32 offset);
U64 dma_read64(U32 dma_object, U32 offset);
void dma_write8(U32 dma_object, U32 offset, U8 value);
void dma_write8(U32 dma_object, U32 offset, U08 value);
void dma_write16(U32 dma_object, U32 offset, U16 value);
void dma_write32(U32 dma_object, U32 offset, U32 value);
void dma_write64(U32 dma_object, U32 offset, U64 value);

2
nucleus/gpu/rsx/rsx_enum.h
View file

@ -102,7 +102,7 @@ enum StencilOp {
RSX_STENCIL_OP_DECR_WRAP = 0x8508,
};
enum VertexType : U8 {
enum VertexType : U08 {
RSX_VERTEX_S1 = 1,
RSX_VERTEX_F = 2,
RSX_VERTEX_SF = 3,

4
nucleus/gpu/rsx/rsx_fp.cpp
View file

@ -78,7 +78,7 @@ Literal RSXFragmentProgram::getTempReg(int index, bool isHalf) {
return tempReg;
}
Literal RSXFragmentProgram::getMaskedValue(Literal dest, Literal source, U8 mask) {
Literal RSXFragmentProgram::getMaskedValue(Literal dest, Literal source, U08 mask) {
// Check if mask enables all components
if (mask == 0b1111) {
return source;
@ -94,7 +94,7 @@ Literal RSXFragmentProgram::getMaskedValue(Literal dest, Literal source, U8 mask
return builder.opVectorShuffle(vecTypeId, dest, source, {x,y,z,w});
}
Literal RSXFragmentProgram::getSwizzledValue(Literal vector, U8 swizzle) {
Literal RSXFragmentProgram::getSwizzledValue(Literal vector, U08 swizzle) {
// Check if swizzling is required. Note that: [11,10,01,00] -> [x,y,z,w].
if (swizzle == 0b11100100) {
return vector;

4
nucleus/gpu/rsx/rsx_fp.h
View file

@ -193,7 +193,7 @@ private:
* @param[in] source Input vector ID whose components will be copied to output
* @param[in] mask Byte containing the 4-bit mask that enable/disable the 4 components (x,y,z,w) to write.
*/
Literal getMaskedValue(Literal dest, Literal source, U8 mask);
Literal getMaskedValue(Literal dest, Literal source, U08 mask);
/**
* Get the vector resulting from swizzling/shuffling its components according to a swizzle argument
@ -201,7 +201,7 @@ private:
* @param[in] swizzle Byte containing the 2-bit swizzle masks for each of the 4 components (x,y,z,w) to read.
* @return Swizzled vector ID
*/
Literal getSwizzledValue(Literal vector, U8 swizzle);
Literal getSwizzledValue(Literal vector, U08 swizzle);
/**
* Get the source vector for the instruction, applying the corresponding modifiers

12
nucleus/gpu/rsx/rsx_pgraph.cpp
View file

@ -93,24 +93,24 @@ void PGRAPH::LoadVertexAttributes(U32 first, U32 count) {
//attr.data.resize(count * attr.size * typeSize);
// Copy data per vertex
U8* data = (U8*)vpeInputs[attrIndex]->map();
U08* data = (U08*)vpeInputs[attrIndex]->map();
for (U32 i = 0; i < count; i++) {
U32 src = addr + vertex_data_base_offset + attr.stride * (first + i + vertex_data_base_index);
void* dst = &/*attr.*/data[i * attr.size * typeSize];
switch (typeSize) {
case 1:
for (U8 j = 0; j < attr.size; j++) {
((U8*)dst)[j] = nucleus.memory->read8(src + 1*j);
for (U08 j = 0; j < attr.size; j++) {
((U08*)dst)[j] = nucleus.memory->read8(src + 1*j);
}
break;
case 2:
for (U8 j = 0; j < attr.size; j++) {
for (U08 j = 0; j < attr.size; j++) {
((U16*)dst)[j] = nucleus.memory->read16(src + 2*j);
}
break;
case 4:
for (U8 j = 0; j < attr.size; j++) {
for (U08 j = 0; j < attr.size; j++) {
((U32*)dst)[j] = nucleus.memory->read32(src + 4*j);
}
break;
@ -330,7 +330,7 @@ void PGRAPH::ClearSurface(U32 mask) {
((clear_color >> 0) & 0xFF) / 255.0f, // Alpha
};
const F32 depth = clear_depth / F32(0xFFFFFF);
const U8 stencil = clear_stencil;
const U08 stencil = clear_stencil;
if (mask & RSX_CLEAR_BIT_COLOR) {
auto* colorTarget = getColorTarget(surface.colorOffset[0]);

22
nucleus/gpu/rsx/rsx_pgraph.h
View file

@ -27,17 +27,17 @@ class RSX;
// RSX Vertex Program attribute
struct rsx_vp_attribute_t {
bool dirty; // Flag: Needs to be reloaded and rebinded.
std::vector<U8> data; // Holds the loaded and converted data.
std::vector<U08> data; // Holds the loaded and converted data.
U16 frequency; // Access frequency of vertex data.
U8 stride; // Offset between two consecutive vertices.
U8 size; // Count of vertex components
U08 stride; // Offset between two consecutive vertices.
U08 size; // Count of vertex components
VertexType type; // Type of vertex components
U32 location; // Location (Local Memory or Main Memory).
U32 offset; // Offset at the specified location.
};
struct Surface {
enum ColorFormat : U8 {
enum ColorFormat : U08 {
FORMAT_X1R5G5B5_Z1R5G5B5 = 1,
FORMAT_X1R5G5B5_O1R5G5B5 = 2,
FORMAT_R5G6B5 = 3,
@ -53,22 +53,22 @@ struct Surface {
FORMAT_X8B8G8R8_O8B8G8R8 = 15,
FORMAT_A8B8G8R8 = 16,
};
enum DepthStencilFormat : U8 {
enum DepthStencilFormat : U08 {
FORMAT_Z16 = 1,
FORMAT_Z24S8 = 2,
};
bool dirty;
U8 type;
U8 antialias;
U08 type;
U08 antialias;
ColorFormat colorFormat;
U8 colorTarget;
U8 colorLocation[4];
U08 colorTarget;
U08 colorLocation[4];
U32 colorOffset[4];
U32 colorPitch[4];
DepthStencilFormat depthFormat;
U8 depthLocation;
U08 depthLocation;
U32 depthOffset;
U32 depthPitch;
U16 width;
@ -151,7 +151,7 @@ public:
// Registers
U32 clear_color;
U32 clear_depth;
U8 clear_stencil;
U08 clear_stencil;
U32 semaphore_index;
U32 vertex_data_base_offset;
U32 vertex_data_base_index;

34
nucleus/gpu/rsx/rsx_texture.h
View file

@ -45,12 +45,12 @@ struct Texture {
U32 offset; // Offset at the specified location
// Format
U8 location; // Location: Local Memory (0) or Main Memory (1)
U8 cubemap;
U8 border;
U8 dimension; // Dimension: 1D texture (1), 2D texture (2) or 3D texture (3)
U8 format; // Color format and optional swizzle/normalization flags
U8 mipmap; // Amount of mipmap leves of the texture
U08 location; // Location: Local Memory (0) or Main Memory (1)
U08 cubemap;
U08 border;
U08 dimension; // Dimension: 1D texture (1), 2D texture (2) or 3D texture (3)
U08 format; // Color format and optional swizzle/normalization flags
U08 mipmap; // Amount of mipmap leves of the texture
// Image rectangle
U16 width;
@ -60,14 +60,14 @@ struct Texture {
U32 border_color;
// Address
U8 wrap_r;
U8 wrap_s;
U8 wrap_t;
U8 anisoBias;
U8 unsignedRemap;
U8 signedRemap;
U8 gamma;
U8 zfunc;
U08 wrap_r;
U08 wrap_s;
U08 wrap_t;
U08 anisoBias;
U08 unsignedRemap;
U08 signedRemap;
U08 gamma;
U08 zfunc;
// Filter
union {
@ -86,11 +86,11 @@ struct Texture {
} filter;
// Control 0
U8 alphakill;
U8 max_aniso;
U08 alphakill;
U08 max_aniso;
U16 max_lod;
U16 min_lod;
U8 enable; // Texture is enabled: True (1) or False (0)
U08 enable; // Texture is enabled: True (1) or False (0)
// Control 1
U32 remap;

4
nucleus/gpu/rsx/rsx_vp.cpp
View file

@ -80,7 +80,7 @@ Literal RSXVertexProgram::getConstantReg(int index) {
return builder.opAccessChain(constMemoryId, {offsetId});
}
Literal RSXVertexProgram::getSwizzledValue(Literal vector, U8 swizzle) {
Literal RSXVertexProgram::getSwizzledValue(Literal vector, U08 swizzle) {
// Check if swizzling is required. Note that: [00,01,10,11] -> [0,1,2,3] -> [x,y,z,w].
if (swizzle == 0b00011011) {
return vector;
@ -143,7 +143,7 @@ void RSXVertexProgram::setDestVector(Literal value) {
}
// Masked write
U8 mask = instr.masc_vec;
U08 mask = instr.masc_vec;
if (mask == 0b0000) { // Check if mask disables all components
return;
}

2
nucleus/gpu/rsx/rsx_vp.h
View file

@ -163,7 +163,7 @@ private:
* @param[in] swizzle Byte containing the 2-bit swizzle masks for each of the 4 components (x,y,z,w) to read.
* @return Swizzled vector ID
*/
Literal getSwizzledValue(Literal vector, U8 swizzle);
Literal getSwizzledValue(Literal vector, U08 swizzle);
/**
* Get the source vector for the instruction, applying the corresponding modifiers

2
nucleus/graphics/backend/direct3d12/direct3d12_command_buffer.cpp
View file

@ -64,7 +64,7 @@ void Direct3D12CommandBuffer::cmdClearColor(ColorTarget* target, const F32* colo
list->ClearRenderTargetView(d3dTarget->handle, colorValue, 0, nullptr);
}
void Direct3D12CommandBuffer::cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U8 stencilValue) {
void Direct3D12CommandBuffer::cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U08 stencilValue) {
auto d3dTarget = static_cast<Direct3D12DepthStencilTarget*>(target);
if (!d3dTarget) {
logger.error(LOG_GRAPHICS, "Direct3D12CommandBuffer::cmdClearDepthStencil: Invalid target specified");

2
nucleus/graphics/backend/direct3d12/direct3d12_command_buffer.h
View file

@ -30,7 +30,7 @@ public:
// Commands
virtual void cmdBindPipeline(Pipeline* pipeline) override;
virtual void cmdClearColor(ColorTarget* target, const F32* colorValue) override;
virtual void cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U8 stencilValue) override;
virtual void cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U08 stencilValue) override;
virtual void cmdDraw(U32 firstVertex, U32 vertexCount, U32 firstInstance, U32 instanceCount) override;
virtual void cmdDrawIndexed(U32 firstIndex, U32 indexCount, U32 vertexOffset, U32 firstInstance, U32 instanceCount) override;
virtual void cmdSetDescriptors(const std::vector<VertexBuffer*>& buffers, const std::vector<Texture*>& textures) override;

2
nucleus/graphics/command_buffer.h
View file

@ -49,7 +49,7 @@ public:
* @param[in] depthValue The value to clear the depth buffer with
* @param[in] stencilValue The value to clear the stencil buffer with
*/
virtual void cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U8 stencilValue) = 0;
virtual void cmdClearDepthStencil(DepthStencilTarget* target, F32 depthValue, U08 stencilValue) = 0;
/**
* Pushes a command to draw instanced, non-indexed geometry

4
nucleus/graphics/frontend/vulkan/vulkan_shader_parser.cpp
View file

@ -134,8 +134,8 @@ bool VulkanShaderParser::checkHeader(const U32* header) {
return false;
}
if (version > 0x00010000) {
const U8 major = version >> 16;
const U8 minor = version >> 8;
const U08 major = version >> 16;
const U08 minor = version >> 8;
logger.warning(LOG_GRAPHICS, "VulkanShaderParser::parse: Unexpected SPIR-V version (%d.%02d)", major, minor);
}
if (schema != 0) {

2
nucleus/graphics/pipeline.h
View file

@ -102,7 +102,7 @@ enum StencilOp {
STENCIL_OP_DECR,
};
using ColorWriteMask = U8;
using ColorWriteMask = U08;
enum : ColorWriteMask {
COLOR_WRITE_ENABLE_RED = (1 << 0),
COLOR_WRITE_ENABLE_GREEN = (1 << 1),

16
nucleus/memory/memory.cpp
View file

@ -73,8 +73,8 @@ bool Memory::check(U32 addr) {
/**
* Read memory reversing endianness if necessary
*/
U8 Memory::read8(U32 addr) {
return *(U8*)((U64)m_base + addr);
U08 Memory::read8(U32 addr) {
return *(U08*)((U64)m_base + addr);
}
U16 Memory::read16(U32 addr) {
return SE16(*(U16*)((U64)m_base + addr));
@ -88,12 +88,12 @@ U64 Memory::read64(U32 addr) {
U128 Memory::read128(U32 addr) {
return SE128(*(U128*)((U64)m_base + addr));
}
void Memory::readLeft(U8* dst, U32 src, U32 size) {
void Memory::readLeft(U08* dst, U32 src, U32 size) {
for (U32 i = 0; i < size; i++) {
dst[size - 1 - i] = read8(src + i);
}
}
void Memory::readRight(U8* dst, U32 src, U32 size) {
void Memory::readRight(U08* dst, U32 src, U32 size) {
for (U32 i = 0; i < size; i++) {
dst[i] = read8(src + (size - 1 - i));
}
@ -102,8 +102,8 @@ void Memory::readRight(U8* dst, U32 src, U32 size) {
/**
* Write memory reversing endianness if necessary
*/
void Memory::write8(U32 addr, U8 value) {
*(U8*)((U64)m_base + addr) = value;
void Memory::write8(U32 addr, U08 value) {
*(U08*)((U64)m_base + addr) = value;
}
void Memory::write16(U32 addr, U16 value) {
*(U16*)((U64)m_base + addr) = SE16(value);
@ -117,12 +117,12 @@ void Memory::write64(U32 addr, U64 value) {
void Memory::write128(U32 addr, U128 value) {
*(U128*)((U64)m_base + addr) = SE128(value);
}
void Memory::writeLeft(U32 dst, U8* src, U32 size) {
void Memory::writeLeft(U32 dst, U08* src, U32 size) {
for (U32 i = 0; i < size; i++) {
write8(dst + i, src[size - 1 - i]);
}
}
void Memory::writeRight(U32 dst, U8* src, U32 size) {
void Memory::writeRight(U32 dst, U08* src, U32 size) {
for (U32 i = 0; i < size; i++) {
write8(dst + (size - 1 - i), src[i]);
}

12
nucleus/memory/memory.h
View file

@ -35,21 +35,21 @@ public:
void free(U32 addr);
bool check(U32 addr);
U8 read8(U32 addr);
U08 read8(U32 addr);
U16 read16(U32 addr);
U32 read32(U32 addr);
U64 read64(U32 addr);
U128 read128(U32 addr);
void readLeft(U8* dst, U32 src, U32 size);
void readRight(U8* dst, U32 src, U32 size);
void readLeft(U08* dst, U32 src, U32 size);
void readRight(U08* dst, U32 src, U32 size);
void write8(U32 addr, U8 value);
void write8(U32 addr, U08 value);
void write16(U32 addr, U16 value);
void write32(U32 addr, U32 value);
void write64(U32 addr, U64 value);
void write128(U32 addr, U128 value);
void writeLeft(U32 dst, U8* src, U32 size);
void writeRight(U32 dst, U8* src, U32 size);
void writeLeft(U32 dst, U08* src, U32 size);
void writeRight(U32 dst, U08* src, U32 size);
void* getBaseAddr() { return m_base; }

12
nucleus/system/keys.h
View file

@ -23,17 +23,17 @@ struct SelfKey {
U64 version;
U16 revision;
U32 ctype;
U8 erk[0x20];
U8 riv[0x10];
U8 pub[0x28];
U8 priv[0x15];
U08 erk[0x20];
U08 riv[0x10];
U08 pub[0x28];
U08 priv[0x15];
};
static U8 NP_KLIC_FREE[0x10] = {
static U08 NP_KLIC_FREE[0x10] = {
0x72, 0xF9, 0x90, 0x78, 0x8F, 0x9C, 0xFF, 0x74, 0x57, 0x25, 0xF0, 0x8E, 0x4C, 0x12, 0x83, 0x87
};
static U8 NP_KLIC_KEY[0x10] = {
static U08 NP_KLIC_KEY[0x10] = {
0xF2, 0xFB, 0xCA, 0x7A, 0x75, 0xB0, 0x4E, 0xDC, 0x13, 0x90, 0x63, 0x8C, 0xCD, 0xFD, 0xD1, 0xEE
};

2
nucleus/system/scei/cellos/lv1/lv1_gpu.cpp
View file

@ -69,7 +69,7 @@ S32 lv1_gpu_context_attribute(S32 context_id, U32 operation_code, U64 p1, U64 p2
break;
case L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_BUFFER: {
U8 id = p1 & 0xFF;
U08 id = p1 & 0xFF;
U32 width = (p2 >> 32) & 0xFFFFFFFF;
U32 height = p2 & 0xFFFFFFFF;
U32 pitch = (p3 >> 32) & 0xFFFFFFFF;

2
nucleus/system/scei/cellos/lv2/sys_cond.h
View file

@ -18,7 +18,7 @@ struct sys_cond_attribute_t
BE<U32> pshared;
BE<U64> ipc_key;
BE<S32> flags;
S8 name[8];
S08 name[8];
};
// Auxiliary classes

4
nucleus/system/scei/cellos/lv2/sys_dbg.h
View file

@ -17,14 +17,14 @@ enum {
// Classes
union sys_dbg_spu_fpscr_t {
U8 vrb[16]; // Byte
U08 vrb[16]; // Byte
U16 vrh[8]; // Half-word
U32 vrw[4]; // Word
U64 vrd[2]; // Double-word
};
union sys_dbg_spu_gpr_t {
U8 vrb[16]; // Byte
U08 vrb[16]; // Byte
U16 vrh[8]; // Half-word
U32 vrw[4]; // Word
U64 vrd[2]; // Double-word

6
nucleus/system/scei/cellos/lv2/sys_event.h
View file

@ -43,14 +43,14 @@ struct sys_event_flag_attr_t
BE<U64> ipc_key;
BE<S32> flags;
BE<S32> type;
S8 name[8];
S08 name[8];
};
struct sys_event_queue_attr_t
{
BE<U32> protocol;
BE<S32> type;
S8 name[8];
S08 name[8];
};
// Auxiliary classes
@ -75,7 +75,7 @@ struct sys_event_port_t
sys_event_queue_t* equeue = nullptr;
U32 type;
union {
S8 name[8];
S08 name[8];
U64 name_value;
};
};

4
nucleus/system/scei/cellos/lv2/sys_fs.cpp
View file

@ -14,7 +14,7 @@
namespace sys {
// SysCalls
S32 sys_fs_open(const S8* path, S32 flags, BE<S32>* fd, U64 mode, const void* arg, U64 size) {
S32 sys_fs_open(const S08* path, S32 flags, BE<S32>* fd, U64 mode, const void* arg, U64 size) {
LV2& lv2 = static_cast<LV2&>(*nucleus.sys.get());
// Create file
@ -117,7 +117,7 @@ S32 sys_fs_fstat(S32 fd, sys_fs_stat_t* sb) {
return CELL_OK;
}
S32 sys_fs_stat(const S8* path, sys_fs_stat_t* sb) {
S32 sys_fs_stat(const S08* path, sys_fs_stat_t* sb) {
// Check requisites
if (path == nucleus.memory->ptr(0) || sb == nucleus.memory->ptr(0)) {
return CELL_EFAULT;

22
nucleus/system/scei/cellos/lv2/sys_fs.h
View file

@ -49,9 +49,9 @@ enum {
// Structs
struct sys_fs_dirent_t
{
U8 d_type;
U8 d_namlen;
S8 d_name[CELL_MAX_FS_FILE_NAME_LENGTH + 1];
U08 d_type;
U08 d_namlen;
S08 d_name[CELL_MAX_FS_FILE_NAME_LENGTH + 1];
};
struct sys_fs_stat_t
@ -79,20 +79,20 @@ struct sys_fs_t
};
// SysCalls
S32 sys_fs_open(const S8* path, S32 flags, BE<S32>* fd, U64 mode, const void* arg, U64 size);
S32 sys_fs_open(const S08* path, S32 flags, BE<S32>* fd, U64 mode, const void* arg, U64 size);
S32 sys_fs_read(S32 fd, void* buf, U64 nbytes, BE<U64>* nread);
S32 sys_fs_write(S32 fd, const void* buf, U64 nbytes, BE<U64>* nwrite);
S32 sys_fs_close(S32 fd);
S32 sys_fs_opendir(const S8* path, S32* fd);
S32 sys_fs_opendir(const S08* path, S32* fd);
S32 sys_fs_readdir(S32 fd, sys_fs_dirent_t* dir, BE<U64>* nread);
S32 sys_fs_closedir(S32 fd);
S32 sys_fs_stat(const S8* path, sys_fs_stat_t* sb);
S32 sys_fs_stat(const S08* path, sys_fs_stat_t* sb);
S32 sys_fs_fstat(S32 fd, sys_fs_stat_t* sb);
S32 sys_fs_link(const S8* path, const S8* arg0);
S32 sys_fs_mkdir(const S8* path, U32 mode);
S32 sys_fs_rename(const S8* from, const S8* to);
S32 sys_fs_rmdir(const S8* path);
S32 sys_fs_unlink(const S8* path);
S32 sys_fs_link(const S08* path, const S08* arg0);
S32 sys_fs_mkdir(const S08* path, U32 mode);
S32 sys_fs_rename(const S08* from, const S08* to);
S32 sys_fs_rmdir(const S08* path);
S32 sys_fs_unlink(const S08* path);
S32 sys_fs_fcntl();
S32 sys_fs_lseek(S32 fd, S64 offset, S32 whence, U64 *pos);

2
nucleus/system/scei/cellos/lv2/sys_lwmutex.h
View file

@ -15,7 +15,7 @@ struct sys_lwmutex_attribute_t
{
BE<U32> protocol;
BE<U32> recursive;
S8 name[8];
S08 name[8];
};
// Auxiliary classes

4
nucleus/system/scei/cellos/lv2/sys_mutex.h
View file

@ -25,8 +25,8 @@ struct sys_mutex_attribute_t
BE<U32> adaptive;
BE<U64> ipc_key;
BE<S32> flags;
S8 padding[4];
S8 name[8];
S08 padding[4];
S08 name[8];
};
struct sys_mutex_t

2
nucleus/system/scei/cellos/lv2/sys_ppu_thread.cpp
View file

@ -11,7 +11,7 @@
namespace sys {
S32 sys_ppu_thread_create(BE<U64>* thread_id, sys_ppu_thread_attr_t* attr, U64 arg, U64 unk0, S32 prio, U32 stacksize, U64 flags, S8* threadname) {
S32 sys_ppu_thread_create(BE<U64>* thread_id, sys_ppu_thread_attr_t* attr, U64 arg, U64 unk0, S32 prio, U32 stacksize, U64 flags, S08* threadname) {
LV2& lv2 = static_cast<LV2&>(*nucleus.sys.get());
const U32 entry_pc = nucleus.memory->read32(attr->entry);

4
nucleus/system/scei/cellos/lv2/sys_ppu_thread.h
View file

@ -30,7 +30,7 @@ struct sys_ppu_thread_t {
};
// SysCalls
S32 sys_ppu_thread_create(BE<U64>* thread_id, sys_ppu_thread_attr_t* attr, U64 arg, U64 unk0, S32 prio, U32 stacksize, U64 flags, S8* threadname);
S32 sys_ppu_thread_create(BE<U64>* thread_id, sys_ppu_thread_attr_t* attr, U64 arg, U64 unk0, S32 prio, U32 stacksize, U64 flags, S08* threadname);
S32 sys_ppu_thread_detach(U64 thread_id);
S32 sys_ppu_thread_exit(S32 errorcode);
void sys_ppu_thread_get_join_state(BE<S32>* isjoinable);
@ -38,7 +38,7 @@ S32 sys_ppu_thread_get_priority(U64 thread_id, BE<S32>* prio);
S32 sys_ppu_thread_get_stack_information(sys_ppu_thread_stack_t* info);
S32 sys_ppu_thread_join(U64 thread_id, BE<U64>* vptr);
S32 sys_ppu_thread_restart();
S32 sys_ppu_thread_rename(U64 thread_id, S8* name);
S32 sys_ppu_thread_rename(U64 thread_id, S08* name);
S32 sys_ppu_thread_set_priority(U64 thread_id, S32 prio);
S32 sys_ppu_thread_start(U64 thread_id);
S32 sys_ppu_thread_stop(U64 thread_id);

2
nucleus/system/scei/cellos/lv2/sys_process.cpp
View file

@ -28,7 +28,7 @@ S32 sys_process_exit(S32 errorcode) {
return CELL_OK;
}
S32 sys_process_get_paramsfo(U8* buffer) {
S32 sys_process_get_paramsfo(U08* buffer) {
LV2& lv2 = static_cast<LV2&>(*nucleus.sys.get());
return CELL_OK;

2
nucleus/system/scei/cellos/lv2/sys_process.h
View file

@ -79,7 +79,7 @@ S32 sys_process_getpid();
S32 sys_process_getppid();
S32 sys_process_get_number_of_object(U32 object, BE<U32>* nump);
S32 sys_process_get_id(U32 object, BE<U32>* buffer, U32 size, BE<U32>* set_size);
S32 sys_process_get_paramsfo(U8* buffer);
S32 sys_process_get_paramsfo(U08* buffer);
S32 sys_process_get_sdk_version(U32 pid, BE<U32>* version);
S32 sys_process_get_status(U64 unk);
S32 sys_process_exit(S32 errorcode);

6
nucleus/system/scei/cellos/lv2/sys_prx.cpp
View file

@ -14,7 +14,7 @@
namespace sys {
S32 sys_prx_load_module(const S8* path, U64 flags, sys_prx_load_module_option_t* pOpt) {
S32 sys_prx_load_module(const S08* path, U64 flags, sys_prx_load_module_option_t* pOpt) {
LV2& lv2 = static_cast<LV2&>(*nucleus.sys.get());
SELFLoader self;
@ -46,7 +46,7 @@ S32 sys_prx_load_module_list(S32 count, BE<U64>* pathList, U64 flags, void* pOpt
LV2& lv2 = static_cast<LV2&>(*nucleus.sys.get());
for (S32 i = 0; i < count; i++) {
auto* path = (S8*)((U64)nucleus.memory->getBaseAddr() + pathList[i]);
auto* path = (S08*)((U64)nucleus.memory->getBaseAddr() + pathList[i]);
auto* pOpt = nucleus.memory->ptr<sys_prx_load_module_option_t>(0);
const S32 ret = sys_prx_load_module(path, flags, pOpt);
@ -73,7 +73,7 @@ S32 sys_prx_start_module(S32 id, U64 flags, sys_prx_start_module_option_t* pOpt)
offset += importedLibrary.size;
for (const auto& lib : prx->exported_libs) {
if (lib.name != nucleus.memory->ptr<S8>(importedLibrary.name_addr)) {
if (lib.name != nucleus.memory->ptr<S08>(importedLibrary.name_addr)) {
continue;
}
for (U32 i = 0; i < importedLibrary.num_func; i++) {

18
nucleus/system/scei/cellos/lv2/sys_prx.h
View file

@ -45,7 +45,7 @@ struct sys_prx_module_info_t
{
BE<U16> attributes;
BE<U16> version;
S8 name[28];
S08 name[28];
BE<U32> toc;
BE<U32> exports_start;
BE<U32> exports_end;
@ -56,16 +56,16 @@ struct sys_prx_module_info_t
// Information about imported or exported libraries in PRX modules
struct sys_prx_library_info_t
{
U8 size;
U8 unk0;
U08 size;
U08 unk0;
BE<U16> version;
BE<U16> attributes;
BE<U16> num_func;
BE<U16> num_var;
BE<U16> num_tlsvar;
U8 info_hash;
U8 info_tlshash;
U8 unk1[2];
U08 info_hash;
U08 info_tlshash;
U08 unk1[2];
BE<U32> name_addr;
BE<U32> fnid_addr;
BE<U32> fstub_addr;
@ -80,8 +80,8 @@ struct sys_prx_relocation_info_t
{
BE<U64> offset;
BE<U16> unk0;
U8 index_value; // Index of the LOAD segment that updated its base address
U8 index_addr; // Index of the LOAD segment containing the address to patch
U08 index_value; // Index of the LOAD segment that updated its base address
U08 index_addr; // Index of the LOAD segment containing the address to patch
BE<U32> type;
BE<U64> ptr;
};
@ -145,7 +145,7 @@ struct sys_prx_t
// SysCalls
S32 sys_prx_0x1CE();
S32 sys_prx_load_module(const S8* path, U64 flags, sys_prx_load_module_option_t* pOpt);
S32 sys_prx_load_module(const S08* path, U64 flags, sys_prx_load_module_option_t* pOpt);
S32 sys_prx_load_module_by_fd();
S32 sys_prx_load_module_list(S32 count, BE<U64>* pathList, U64 flags, void* pOpt, BE<U32>* idList);
S32 sys_prx_load_module_on_memcontainer();

4
nucleus/system/scei/cellos/lv2/sys_rsx.h
View file

@ -11,8 +11,8 @@ namespace sys {
// Kernel structures
struct sys_rsx_device_t {
S8 init_flag;
S8 pad[7];
S08 init_flag;
S08 pad[7];
BE<S64> lpar_size;
BE<S64> lpar_addr;
BE<S32> ctx_count;

2
nucleus/system/scei/cellos/lv2/sys_semaphore.h
View file

@ -19,7 +19,7 @@ struct sys_semaphore_attribute_t
BE<U64> ipc_key;
BE<S32> flags;
BE<U32> pad;
S8 name[8];
S08 name[8];
};
// Auxiliary classes

4
nucleus/system/scei/cellos/lv2/sys_tty.cpp
View file

@ -10,11 +10,11 @@
namespace sys {
S32 sys_tty_read(S32 ch, S8* buf, S32 len, U32* preadlen) {
S32 sys_tty_read(S32 ch, S08* buf, S32 len, U32* preadlen) {
return CELL_OK;
}
S32 sys_tty_write(S32 ch, S8* buf, S32 len, U32* pwritelen) {
S32 sys_tty_write(S32 ch, S08* buf, S32 len, U32* pwritelen) {
if (ch > 15 || len <= 0) {
return CELL_EINVAL;
}

4
nucleus/system/scei/cellos/lv2/sys_tty.h
View file

@ -31,7 +31,7 @@ enum {
};
// SysCalls
S32 sys_tty_read(S32 ch, S8* buf, S32 len, U32* preadlen);
S32 sys_tty_write(S32 ch, S8* buf, S32 len, U32* pwritelen);
S32 sys_tty_read(S32 ch, S08* buf, S32 len, U32* preadlen);
S32 sys_tty_write(S32 ch, S08* buf, S32 len, U32* pwritelen);
} // namespace sys

24
nucleus/system/scei/cellos/modules/libsysutil.h
View file

@ -101,26 +101,26 @@ enum CellVideoOutRefreshRate {
// Data types
struct CellVideoOutDisplayMode {
BE<U8> resolutionId;
BE<U8> scanMode;
BE<U8> conversion;
BE<U8> aspect;
BE<U8> reserved[2];
BE<U08> resolutionId;
BE<U08> scanMode;
BE<U08> conversion;
BE<U08> aspect;
BE<U08> reserved[2];
BE<U16> refreshRates;
};
struct CellVideoOutState {
BE<U8> state;
BE<U8> colorSpace;
BE<U8> reserved[6];
BE<U08> state;
BE<U08> colorSpace;
BE<U08> reserved[6];
CellVideoOutDisplayMode displayMode;
};
struct CellVideoOutConfiguration {
BE<U8> resolutionId;
BE<U8> format;
BE<U8> aspect;
BE<U8> reserved[9];
BE<U08> resolutionId;
BE<U08> format;
BE<U08> aspect;
BE<U08> reserved[9];
BE<U32> pitch;
};

12
nucleus/system/scei/pkg.h
View file

@ -33,12 +33,12 @@ struct PKGHeader {
BE<U64> total_size; // Total PKG file size
BE<U64> data_offset; // Encrypted data offset
BE<U64> data_size; // Encrypted data size
S8 contentid[48]; // Content ID (similar to "XX####-XXXX#####_##-XXXXXXXXXXXX####")
S8 digest[16]; // SHA1 hash from files and attributes
S8 klicensee[16]; // AES-128-CTR IV
S8 header_cmac_hash[16]; // CMAC OMAC hash of [0x00, 0x7F]
S8 header_npdrm_signature[40]; // Header NPDRM ECDSA (R_sig, S_sig)
S8 header_sha1_hash[8]; // Last 8 bytes of SHA1 of [0x00, 0x7F]
S08 contentid[48]; // Content ID (similar to "XX####-XXXX#####_##-XXXXXXXXXXXX####")
S08 digest[16]; // SHA1 hash from files and attributes
S08 klicensee[16]; // AES-128-CTR IV
S08 header_cmac_hash[16]; // CMAC OMAC hash of [0x00, 0x7F]
S08 header_npdrm_signature[40]; // Header NPDRM ECDSA (R_sig, S_sig)
S08 header_sha1_hash[8]; // Last 8 bytes of SHA1 of [0x00, 0x7F]
};
struct PKGEntry {

26
nucleus/system/scei/self.cpp
View file

@ -315,8 +315,8 @@ bool SELFLoader::decryptMetadata()
auto& meta_info = (MetadataInfo&)self[sizeof(SceHeader) + sce_header.meta];
// Decrypt NPDRM Layer if necessary
U8 npdrm_key[0x10];
U8 npdrm_iv[0x10] = {};
U08 npdrm_key[0x10];
U08 npdrm_iv[0x10] = {};
U32 offset = self_header.controloff;
while (offset < self_header.controloff + self_header.controlsize) {
const auto& ctrl = (ControlInfo&)self[offset];
@ -339,19 +339,19 @@ bool SELFLoader::decryptMetadata()
aes_setkey_dec(&aes, NP_KLIC_KEY, 128);
aes_crypt_ecb(&aes, AES_DECRYPT, npdrm_key, npdrm_key);
aes_setkey_dec(&aes, npdrm_key, 128);
aes_crypt_cbc(&aes, AES_DECRYPT, sizeof(MetadataInfo), npdrm_iv, (U8*)&meta_info, (U8*)&meta_info);
aes_crypt_cbc(&aes, AES_DECRYPT, sizeof(MetadataInfo), npdrm_iv, (U08*)&meta_info, (U08*)&meta_info);
break;
}
// Decrypt Metadata Info
U8 metadata_iv[0x10];
U08 metadata_iv[0x10];
memcpy(metadata_iv, key.riv, 0x10);
aes_setkey_dec(&aes, key.erk, 256);
aes_crypt_cbc(&aes, AES_DECRYPT, sizeof(MetadataInfo), metadata_iv, (U8*)&meta_info, (U8*)&meta_info);
aes_crypt_cbc(&aes, AES_DECRYPT, sizeof(MetadataInfo), metadata_iv, (U08*)&meta_info, (U08*)&meta_info);
// Decrypt Metadata Headers (Metadata Header + Metadata Section Headers)
U8 ctr_stream_block[0x10];
U8* meta_headers = (U8*)&self[sizeof(SceHeader) + sce_header.meta + sizeof(MetadataInfo)];
U08 ctr_stream_block[0x10];
U08* meta_headers = (U08*)&self[sizeof(SceHeader) + sce_header.meta + sizeof(MetadataInfo)];
U32 meta_headers_size = sce_header.hsize - (sizeof(SceHeader) + sce_header.meta + sizeof(MetadataInfo));
size_t ctr_nc_off = 0;
aes_setkey_enc(&aes, meta_info.key, 128);
@ -416,7 +416,7 @@ bool SELFLoader::decrypt()
decryptMetadata();
const U32 meta_header_off = sizeof(SceHeader) + sce_header.meta + sizeof(MetadataInfo);
const auto& meta_header = (MetadataHeader&)self[meta_header_off];
const U8* data_keys = (U8*)&self[meta_header_off + sizeof(MetadataHeader) + meta_header.section_count * sizeof(MetadataSectionHeader)];
const U08* data_keys = (U08*)&self[meta_header_off + sizeof(MetadataHeader) + meta_header.section_count * sizeof(MetadataSectionHeader)];
// Get ELF size and allocate/initialize it
const U64 elfSize = getDecryptedElfSize();
@ -442,19 +442,19 @@ bool SELFLoader::decrypt()
continue;
}
U8* data_decrypted = new U8[meta_shdr.data_size.ToLE()]();
U8* data_decompressed = new U8[meta_phdr.filesz.ToLE()]();
U08* data_decrypted = new U08[meta_shdr.data_size.ToLE()]();
U08* data_decompressed = new U08[meta_phdr.filesz.ToLE()]();
// Decrypt if necessary
if (meta_shdr.encrypted == 3) {
U8 data_key[0x10];
U8 data_iv[0x10];
U08 data_key[0x10];
U08 data_iv[0x10];
memcpy(data_key, data_keys + meta_shdr.key_idx * 0x10, 0x10);
memcpy(data_iv, data_keys + meta_shdr.iv_idx * 0x10, 0x10);
memcpy(data_decrypted, &self[meta_shdr.data_offset], meta_shdr.data_size);
// Perform AES-CTR encryption on the data
U8 ctr_stream_block[0x10] = {};
U08 ctr_stream_block[0x10] = {};
size_t ctr_nc_off = 0;
aes_setkey_enc(&aes, data_key, 128);
aes_crypt_ctr(&aes, meta_shdr.data_size, &ctr_nc_off, data_iv, ctr_stream_block, data_decrypted, data_decrypted);

30
nucleus/system/scei/self.h
View file

@ -117,10 +117,10 @@ struct AppInfo
struct MetadataInfo
{
U8 key[0x10];
U8 key_pad[0x10];
U8 iv[0x10];
U8 iv_pad[0x10];
U08 key[0x10];
U08 key_pad[0x10];
U08 iv[0x10];
U08 iv_pad[0x10];
};
struct MetadataHeader
@ -167,13 +167,13 @@ struct ControlInfo
} control_flags;
struct { // Type 2 (0x30 bytes)
U8 digest[20];
U08 digest[20];
U64 unknown;
} file_digest40;
struct { // Type 2 (0x40 bytes)
U8 digest1[20];
U8 digest2[20];
U08 digest1[20];
U08 digest2[20];
BE<U64> unknown;
} file_digest30;
@ -182,10 +182,10 @@ struct ControlInfo
BE<U32> unknown1;
BE<U32> license;
BE<U32> type;
U8 content_id[48];
U8 digest[16];
U8 invdigest[16];
U8 xordigest[16];
U08 content_id[48];
U08 digest[16];
U08 invdigest[16];
U08 xordigest[16];
BE<U64> unknown2;
BE<U64> unknown3;
} npdrm;
@ -196,10 +196,10 @@ struct ControlInfo
struct Elf64_Ehdr
{
BE<U32> magic;
BE<U8> elf_class;
BE<U8> data;
BE<U8> curver;
BE<U8> os_abi;
BE<U08> elf_class;
BE<U08> data;
BE<U08> curver;
BE<U08> os_abi;
BE<U64> abi_ver;
BE<U16> type;
BE<U16> machine;

14
nucleus/types.h
View file

@ -7,12 +7,12 @@
#include <cstddef>
using S8 = char;
using S08 = char;
using S16 = short;
using S32 = int;
using S64 = long long;
using U8 = unsigned char;
using U08 = unsigned char;
using U16 = unsigned short;
using U32 = unsigned int;
using U64 = unsigned long long;
@ -21,7 +21,7 @@ using F32 = float;
using F64 = double;
using Size = size_t;
using Byte = U8;
using Byte = U08;
struct U128 {
U64 lo, hi;
@ -73,8 +73,8 @@ union V128 {
S32 s32[4];
U16 u16[8];
S16 s16[8];
U8 u8[16];
S8 s8[16];
U08 u8[16];
S08 s8[16];
static V128 from(F32 a0, F32 a1, F32 a2, F32 a3) {
V128 result;
@ -100,8 +100,8 @@ union V256 {
S32 s32[8];
U16 u16[16];
S16 s16[16];
U8 u8[32];
S8 s8[32];
U08 u8[32];
S08 s8[32];
static V256 from(F64 a0, F64 a1, F64 a2, F64 a3) {
V256 result;