Merge pull request #15 from hch12907/vu-interpreter

VU instruction table
This commit is contained in:
Marco Satti 2018-09-23 22:29:52 +08:00 committed by GitHub
commit f83bf61314
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GPG key ID: 4AEE18F83AFDEB23
6 changed files with 813 additions and 30 deletions

View file

@ -188,6 +188,7 @@ set(COMMON_SRC_FILES
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/VpuRegisters.hpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/RVu.cpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/RVu.hpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.cpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/VuInstruction.hpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/VuRegisters.hpp"
"${CMAKE_SOURCE_DIR}/liborbum/src/Resources/Ee/Vpu/Vu/VuUnitRegisters.cpp"

View file

@ -220,5 +220,170 @@ public:
void XITOP(VuUnit_Base* unit, const VuInstruction inst);
void (CVuInterpreter::*VU_INSTRUCTION_TABLE[Constants::EE::VPU::VU::NUMBER_VU_INSTRUCTIONS])(VuUnit_Base* unit, const VuInstruction inst) =
{};
{
&CVuInterpreter::ABS,
&CVuInterpreter::ADD,
&CVuInterpreter::ADDi,
&CVuInterpreter::ADDq,
&CVuInterpreter::ADDbc_0,
&CVuInterpreter::ADDbc_1,
&CVuInterpreter::ADDbc_2,
&CVuInterpreter::ADDbc_3,
&CVuInterpreter::ADDA,
&CVuInterpreter::ADDAi,
&CVuInterpreter::ADDAq,
&CVuInterpreter::ADDAbc_0,
&CVuInterpreter::ADDAbc_1,
&CVuInterpreter::ADDAbc_2,
&CVuInterpreter::ADDAbc_3,
&CVuInterpreter::SUB,
&CVuInterpreter::SUBi,
&CVuInterpreter::SUBq,
&CVuInterpreter::SUBbc_0,
&CVuInterpreter::SUBbc_1,
&CVuInterpreter::SUBbc_2,
&CVuInterpreter::SUBbc_3,
&CVuInterpreter::SUBA,
&CVuInterpreter::SUBAi,
&CVuInterpreter::SUBAq,
&CVuInterpreter::SUBAbc_0,
&CVuInterpreter::SUBAbc_1,
&CVuInterpreter::SUBAbc_2,
&CVuInterpreter::SUBAbc_3,
&CVuInterpreter::MUL,
&CVuInterpreter::MULi,
&CVuInterpreter::MULq,
&CVuInterpreter::MULbc_0,
&CVuInterpreter::MULbc_1,
&CVuInterpreter::MULbc_2,
&CVuInterpreter::MULbc_3,
&CVuInterpreter::MULA,
&CVuInterpreter::MULAi,
&CVuInterpreter::MULAq,
&CVuInterpreter::MULAbc_0,
&CVuInterpreter::MULAbc_1,
&CVuInterpreter::MULAbc_2,
&CVuInterpreter::MULAbc_3,
&CVuInterpreter::MADD,
&CVuInterpreter::MADDi,
&CVuInterpreter::MADDq,
&CVuInterpreter::MADDbc_0,
&CVuInterpreter::MADDbc_1,
&CVuInterpreter::MADDbc_2,
&CVuInterpreter::MADDbc_3,
&CVuInterpreter::MADDA,
&CVuInterpreter::MADDAi,
&CVuInterpreter::MADDAq,
&CVuInterpreter::MADDAbc_0,
&CVuInterpreter::MADDAbc_1,
&CVuInterpreter::MADDAbc_2,
&CVuInterpreter::MADDAbc_3,
&CVuInterpreter::MSUB,
&CVuInterpreter::MSUBi,
&CVuInterpreter::MSUBq,
&CVuInterpreter::MSUBbc_0,
&CVuInterpreter::MSUBbc_1,
&CVuInterpreter::MSUBbc_2,
&CVuInterpreter::MSUBbc_3,
&CVuInterpreter::MSUBA,
&CVuInterpreter::MSUBAi,
&CVuInterpreter::MSUBAq,
&CVuInterpreter::MSUBAbc_0,
&CVuInterpreter::MSUBAbc_1,
&CVuInterpreter::MSUBAbc_2,
&CVuInterpreter::MSUBAbc_3,
&CVuInterpreter::MAX,
&CVuInterpreter::MAXi,
&CVuInterpreter::MAXbc_0,
&CVuInterpreter::MAXbc_1,
&CVuInterpreter::MAXbc_2,
&CVuInterpreter::MAXbc_3,
&CVuInterpreter::MINI,
&CVuInterpreter::MINIi,
&CVuInterpreter::MINIbc_0,
&CVuInterpreter::MINIbc_1,
&CVuInterpreter::MINIbc_2,
&CVuInterpreter::MINIbc_3,
&CVuInterpreter::OPMULA,
&CVuInterpreter::OPMSUB,
&CVuInterpreter::NOP,
&CVuInterpreter::FTOI0,
&CVuInterpreter::FTOI4,
&CVuInterpreter::FTOI12,
&CVuInterpreter::FTOI15,
&CVuInterpreter::ITOF0,
&CVuInterpreter::ITOF4,
&CVuInterpreter::ITOF12,
&CVuInterpreter::ITOF15,
&CVuInterpreter::CLIP,
&CVuInterpreter::DIV,
&CVuInterpreter::SQRT,
&CVuInterpreter::RSQRT,
&CVuInterpreter::IADD,
&CVuInterpreter::IADDI,
&CVuInterpreter::IADDIU,
&CVuInterpreter::IAND,
&CVuInterpreter::IOR,
&CVuInterpreter::ISUB,
&CVuInterpreter::ISUBIU,
&CVuInterpreter::MOVE,
&CVuInterpreter::MFIR,
&CVuInterpreter::MTIR,
&CVuInterpreter::MR32,
&CVuInterpreter::LQ,
&CVuInterpreter::LQD,
&CVuInterpreter::LQI,
&CVuInterpreter::SQ,
&CVuInterpreter::SQD,
&CVuInterpreter::SQI,
&CVuInterpreter::ILW,
&CVuInterpreter::ISW,
&CVuInterpreter::ILWR,
&CVuInterpreter::ISWR,
&CVuInterpreter::RINIT,
&CVuInterpreter::RGET,
&CVuInterpreter::RNEXT,
&CVuInterpreter::RXOR,
&CVuInterpreter::WAITQ,
&CVuInterpreter::FSAND,
&CVuInterpreter::FSEQ,
&CVuInterpreter::FSOR,
&CVuInterpreter::FSSET,
&CVuInterpreter::FMAND,
&CVuInterpreter::FMEQ,
&CVuInterpreter::FMOR,
&CVuInterpreter::FCAND,
&CVuInterpreter::FCEQ,
&CVuInterpreter::FCOR,
&CVuInterpreter::FCSET,
&CVuInterpreter::FCGET,
&CVuInterpreter::IBEQ,
&CVuInterpreter::IBGEZ,
&CVuInterpreter::IBGTZ,
&CVuInterpreter::IBLEZ,
&CVuInterpreter::IBLTZ,
&CVuInterpreter::IBNE,
&CVuInterpreter::B,
&CVuInterpreter::BAL,
&CVuInterpreter::JR,
&CVuInterpreter::JALR,
&CVuInterpreter::MFP,
&CVuInterpreter::WAITP,
&CVuInterpreter::ESADD,
&CVuInterpreter::ERSADD,
&CVuInterpreter::ELENG,
&CVuInterpreter::ERLENG,
&CVuInterpreter::EATANxy,
&CVuInterpreter::EATANxz,
&CVuInterpreter::ESUM,
&CVuInterpreter::ERCPR,
&CVuInterpreter::ESQRT,
&CVuInterpreter::ERSQRT,
&CVuInterpreter::ESIN,
&CVuInterpreter::EATAN,
&CVuInterpreter::EEXP,
&CVuInterpreter::XGKICK,
&CVuInterpreter::XTOP,
&CVuInterpreter::XITOP
};
};

View file

@ -509,7 +509,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 63:
return &EE_CORE_INSTRUCTION_TABLE[51];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 1:
@ -549,7 +549,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 25:
return &EE_CORE_INSTRUCTION_TABLE[67];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 28:
@ -611,7 +611,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 31:
return &EE_CORE_INSTRUCTION_TABLE[92];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 40:
@ -655,7 +655,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 27:
return &EE_CORE_INSTRUCTION_TABLE[110];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 9:
@ -707,7 +707,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 31:
return &EE_CORE_INSTRUCTION_TABLE[132];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 41:
@ -741,7 +741,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 30:
return &EE_CORE_INSTRUCTION_TABLE[145];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 0:
@ -787,7 +787,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 63:
return &EE_CORE_INSTRUCTION_TABLE[166];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 16:
@ -807,7 +807,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 3:
return &EE_CORE_INSTRUCTION_TABLE[170];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 16:
@ -829,7 +829,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 57:
return &EE_CORE_INSTRUCTION_TABLE[177];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 0:
@ -837,7 +837,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 4:
return &EE_CORE_INSTRUCTION_TABLE[179];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 17:
@ -857,7 +857,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 3:
return &EE_CORE_INSTRUCTION_TABLE[183];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 16:
@ -911,7 +911,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 53:
return &EE_CORE_INSTRUCTION_TABLE[206];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 20:
@ -921,7 +921,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 32:
return &EE_CORE_INSTRUCTION_TABLE[207];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 0:
@ -933,7 +933,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 6:
return &EE_CORE_INSTRUCTION_TABLE[211];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 18:
@ -957,7 +957,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 3:
return &EE_CORE_INSTRUCTION_TABLE[215];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 1:
@ -969,7 +969,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 6:
return &EE_CORE_INSTRUCTION_TABLE[219];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 1:
@ -1015,7 +1015,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 16:
return &EE_CORE_INSTRUCTION_TABLE[236];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 61:
@ -1057,7 +1057,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 16:
return &EE_CORE_INSTRUCTION_TABLE[253];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 62:
@ -1097,7 +1097,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 16:
return &EE_CORE_INSTRUCTION_TABLE[269];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 63:
@ -1135,7 +1135,7 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 16:
return &EE_CORE_INSTRUCTION_TABLE[284];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 0:
@ -1249,11 +1249,11 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 57:
return &EE_CORE_INSTRUCTION_TABLE[339];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}
case 2:
@ -1351,6 +1351,6 @@ MipsInstructionInfo* EeCoreInstruction::lookup() const
case 63:
return &EE_CORE_INSTRUCTION_TABLE[386];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("EE Core: Could not determine instruction");
}
}

View file

@ -0,0 +1,613 @@
#include "Resources/Ee/Vpu/Vu/VuInstruction.hpp"
MipsInstructionInfo VU_INSTRUCTION_TABLE[Constants::EE::VPU::VU::NUMBER_VU_INSTRUCTIONS] =
{
// Most VU instructions (Upper Instructions, Flags, Integer Store/Load...)
// follow the basic FMAC pipeline, which has 3 execution stages.
// Stalls on data hazard (when the same field of the same register is accessed
// by following instructions while the first instruction is still running).
// Some instructions follow the FDIV pipeline, which has a significantly
// longer execution time (up to 13 cycles).
// Stalls on resource hazard (when two instructions attempt to use the FDIV
// unit at the same time). There is no data hazard - the original Q register
// (containing results from last FDIV operation) is used instead.
// Instructions prefixed with "E" follow EFU pipeline, which is similar to
// FDIV pipeline, except that EFU is freed when it reaches the write-back
// stage, whereas FDIV is freed when the register is actually written.
// Instructions prefixed with "I" utilizes the IALU unit. While calculation
// is done in 1 cycle, there are 2 dummy stages (made to follow the FMACs),
// which shows up in macro mode (normally the results are bypassed)
// Lower Instructions
{"LQ", 109, 6},
{"SQ", 112, 6},
{"ILW", 115, 6},
{"ISW", 116, 6},
{"IADDIU", 100, 6},
{"ISUBIU", 104, 6},
{"FCEQ", 132, 6},
{"FCSET", 134, 6},
{"FCAND", 131, 6},
{"FCOR", 133, 6},
{"FSEQ", 125, 6},
{"FSSET", 127, 6},
{"FSAND", 124, 6},
{"FSOR", 126, 6},
{"FMEQ", 129, 6},
{"FMAND", 128, 6},
{"FMOR", 130, 6},
{"FCGET", 135, 6},
{"B", 142, 4},
{"BAL", 143, 4},
{"JR", 144, 4},
{"JALR", 145, 4},
{"IBEQ", 136, 4},
{"IBNE", 141, 4},
{"IBLTZ", 140, 4},
{"IBGTZ", 138, 4},
{"IBLEZ", 139, 4},
{"IBGEZ", 137, 4},
{"IADD", 98, 6},
{"ISUB", 103, 6},
{"IADDI", 99, 6},
{"IAND", 101, 6},
{"IOR", 102, 6},
{"MOVE", 105, 6},
{"LQI", 111, 6},
{"DIV", 95, 9},
{"MTIR", 107, 6},
{"RNEXT", 121, 6},
{"MFP", 146, 6},
{"XTOP", 162, 6},
{"XGKICK", 161, 6},
{"ESADD", 148, 13},
{"EATANxy", 152, 56},
{"ESQRT", 156, 14},
{"ESIN", 158, 31},
{"MR32", 108, 6},
{"SQI", 114, 6},
{"SQRT", 96, 9},
{"MFIR", 106, 6},
{"RGET", 120, 6},
{"XITOP", 163, 6},
{"ERSADD", 149, 20},
{"EATANxz", 153, 56},
{"ERSQRT", 157, 20},
{"EATAN", 159, 56},
{"LQD", 110, 6},
{"RSQRT", 97, 15},
{"ILWR", 117, 6},
{"RINIT", 119, 6},
{"ELENG", 150, 20},
{"ESUM", 154, 14},
{"ERCPR", 155, 14},
{"EEXP", 160, 46},
{"SQD", 113, 6},
{"WAITQ", 123, 6},
{"ISWR", 118, 6},
{"RXOR", 122, 6},
{"ERLENG", 151, 26},
{"WAITP", 147, 6},
// Upper Instructions
{"ADDbc_0", 4, 6},
{"ADDbc_1", 5, 6},
{"ADDbc_2", 6, 6},
{"ADDbc_3", 7, 6},
{"SUBbc_0", 18, 6},
{"SUBbc_1", 19, 6},
{"SUBbc_2", 20, 6},
{"SUBbc_3", 21, 6},
{"MADDbc_0", 46, 6},
{"MADDbc_1", 47, 6},
{"MADDbc_2", 48, 6},
{"MADDbc_3", 49, 6},
{"MSUBbc_0", 60, 6},
{"MSUBbc_1", 61, 6},
{"MSUBbc_2", 62, 6},
{"MSUBbc_3", 63, 6},
{"MAXbc_0", 73, 6},
{"MAXbc_1", 74, 6},
{"MAXbc_2", 75, 6},
{"MAXbc_3", 76, 6},
{"MINIbc_0", 79, 6},
{"MINIbc_1", 80, 6},
{"MINIbc_2", 81, 6},
{"MINIbc_3", 82, 6},
{"MULbc_0", 32, 6},
{"MULbc_1", 33, 6},
{"MULbc_2", 34, 6},
{"MULbc_3", 35, 6},
{"MULq", 31, 6},
{"MAXi", 72, 6},
{"MULi", 30, 6},
{"MINIi", 78, 6},
{"ADDq", 3, 6},
{"MADDq", 45, 6},
{"ADDi", 2, 6},
{"MADDi", 44, 6},
{"SUBq", 17, 6},
{"MSUBq", 59, 6},
{"SUBi", 16, 6},
{"MSUBi", 58, 6},
{"ADD", 1, 6},
{"MADD", 43, 6},
{"MUL", 29, 6},
{"MAX", 71, 6},
{"SUB", 15, 6},
{"MSUB", 57, 6},
{"OPMSUB", 84, 6},
{"MINI", 77, 6},
{"ADDAbc_0", 11, 6},
{"SUBAbc_0", 25, 6},
{"MADDAbc_0", 53, 6},
{"MSUBAbc_0", 67, 6},
{"ITOF0", 90, 6},
{"FTOI0", 86, 6},
{"MULAbc_0", 39, 6},
{"MULAq", 38, 6},
{"ADDAq", 10, 6},
{"SUBAq", 24, 6},
{"ADDA", 8, 6},
{"SUBA", 22, 6},
{"ADDAbc_1", 12, 6},
{"SUBAbc_1", 26, 6},
{"MADDAbc_1", 54, 6},
{"MSUBAbc_1", 68, 6},
{"ITOF4", 91, 6},
{"FTOI4", 87, 6},
{"MULAbc_1", 40, 6},
{"ABS", 0, 6},
{"MADDAq", 52, 6},
{"MSUBAq", 66, 6},
{"MADDA", 50, 6},
{"MSUBA", 64, 6},
{"ADDAbc_2", 13, 6},
{"SUBAbc_2", 27, 6},
{"MADDAbc_2", 55, 6},
{"MSUBAbc_2", 69, 6},
{"ITOF12", 92, 6},
{"FTOI12", 88, 6},
{"MULAbc_2", 41, 6},
{"MULAi", 37, 6},
{"ADDAi", 9, 6},
{"SUBAi", 23, 6},
{"MULA", 36, 6},
{"OPMULA", 83, 6},
{"ADDAbc_3", 14, 6},
{"SUBAbc_3", 28, 6},
{"MADDAbc_3", 56, 6},
{"MSUBAbc_3", 70, 6},
{"ITOF15", 93, 6},
{"FTOI15", 89, 6},
{"MULAbc_3", 42, 6},
{"CLIP", 94, 6},
{"MADDAi", 51, 6},
{"MSUBAi", 65, 6},
{"NOP", 85, 6}};
MipsInstructionInfo VuInstruction::lower_lookup() const
{
switch (msb7())
{
case 0:
return VU_INSTRUCTION_TABLE[0];
case 1:
return VU_INSTRUCTION_TABLE[1];
case 4:
return VU_INSTRUCTION_TABLE[2];
case 5:
return VU_INSTRUCTION_TABLE[3];
case 8:
return VU_INSTRUCTION_TABLE[4];
case 9:
return VU_INSTRUCTION_TABLE[5];
case 16:
return VU_INSTRUCTION_TABLE[6];
case 17:
return VU_INSTRUCTION_TABLE[7];
case 18:
return VU_INSTRUCTION_TABLE[8];
case 19:
return VU_INSTRUCTION_TABLE[9];
case 20:
return VU_INSTRUCTION_TABLE[10];
case 21:
return VU_INSTRUCTION_TABLE[11];
case 22:
return VU_INSTRUCTION_TABLE[12];
case 23:
return VU_INSTRUCTION_TABLE[13];
case 24:
return VU_INSTRUCTION_TABLE[14];
case 25:
// fmset theoretically... but it doesn't exist.
case 26:
return VU_INSTRUCTION_TABLE[15];
case 27:
return VU_INSTRUCTION_TABLE[16];
case 28:
return VU_INSTRUCTION_TABLE[17];
case 32:
return VU_INSTRUCTION_TABLE[18];
case 33:
return VU_INSTRUCTION_TABLE[19];
case 36:
return VU_INSTRUCTION_TABLE[20];
case 37:
return VU_INSTRUCTION_TABLE[21];
case 40:
return VU_INSTRUCTION_TABLE[22];
case 41:
return VU_INSTRUCTION_TABLE[23];
case 44:
return VU_INSTRUCTION_TABLE[24];
case 45:
return VU_INSTRUCTION_TABLE[25];
case 46:
return VU_INSTRUCTION_TABLE[26];
case 47:
return VU_INSTRUCTION_TABLE[27];
case 64: // Lower OP
{
switch (opcode())
{
case 48:
return VU_INSTRUCTION_TABLE[28];
case 49:
return VU_INSTRUCTION_TABLE[29];
case 50:
return VU_INSTRUCTION_TABLE[30];
case 52:
return VU_INSTRUCTION_TABLE[31];
case 53:
return VU_INSTRUCTION_TABLE[32];
case 60:
{
switch (fd())
{
case 12:
return VU_INSTRUCTION_TABLE[33];
case 13:
return VU_INSTRUCTION_TABLE[34];
case 14:
return VU_INSTRUCTION_TABLE[35];
case 15:
return VU_INSTRUCTION_TABLE[36];
case 16:
return VU_INSTRUCTION_TABLE[37];
case 25:
return VU_INSTRUCTION_TABLE[38];
case 26:
return VU_INSTRUCTION_TABLE[39];
case 27:
return VU_INSTRUCTION_TABLE[40];
case 28:
return VU_INSTRUCTION_TABLE[41];
case 29:
return VU_INSTRUCTION_TABLE[42];
case 30:
return VU_INSTRUCTION_TABLE[43];
case 31:
return VU_INSTRUCTION_TABLE[44];
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
case 61:
{
switch (fd())
{
case 12:
return VU_INSTRUCTION_TABLE[45];
case 13:
return VU_INSTRUCTION_TABLE[46];
case 14:
return VU_INSTRUCTION_TABLE[47];
case 15:
return VU_INSTRUCTION_TABLE[48];
case 16:
return VU_INSTRUCTION_TABLE[49];
case 26:
return VU_INSTRUCTION_TABLE[50];
case 28:
return VU_INSTRUCTION_TABLE[51];
case 29:
return VU_INSTRUCTION_TABLE[52];
case 30:
return VU_INSTRUCTION_TABLE[53];
case 31:
return VU_INSTRUCTION_TABLE[54];
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
case 62:
{
switch (fd())
{
case 13:
return VU_INSTRUCTION_TABLE[55];
case 14:
return VU_INSTRUCTION_TABLE[56];
case 15:
return VU_INSTRUCTION_TABLE[57];
case 16:
return VU_INSTRUCTION_TABLE[58];
case 28:
return VU_INSTRUCTION_TABLE[59];
case 29:
return VU_INSTRUCTION_TABLE[60];
case 30:
return VU_INSTRUCTION_TABLE[61];
case 31:
return VU_INSTRUCTION_TABLE[62];
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
case 63:
{
switch (fd())
{
case 13:
return VU_INSTRUCTION_TABLE[63];
case 14:
return VU_INSTRUCTION_TABLE[64];
case 15:
return VU_INSTRUCTION_TABLE[65];
case 16:
return VU_INSTRUCTION_TABLE[66];
case 28:
return VU_INSTRUCTION_TABLE[67];
case 30:
return VU_INSTRUCTION_TABLE[68];
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
default:
throw std::runtime_error("VU: Could not determine the lower instruction");
}
}
MipsInstructionInfo VuInstruction::upper_lookup() const
{
switch (opcode())
{
case 0:
return VU_INSTRUCTION_TABLE[69];
case 1:
return VU_INSTRUCTION_TABLE[70];
case 2:
return VU_INSTRUCTION_TABLE[71];
case 3:
return VU_INSTRUCTION_TABLE[72];
case 4:
return VU_INSTRUCTION_TABLE[73];
case 5:
return VU_INSTRUCTION_TABLE[74];
case 6:
return VU_INSTRUCTION_TABLE[75];
case 7:
return VU_INSTRUCTION_TABLE[76];
case 8:
return VU_INSTRUCTION_TABLE[77];
case 9:
return VU_INSTRUCTION_TABLE[78];
case 10:
return VU_INSTRUCTION_TABLE[79];
case 11:
return VU_INSTRUCTION_TABLE[80];
case 12:
return VU_INSTRUCTION_TABLE[81];
case 13:
return VU_INSTRUCTION_TABLE[82];
case 14:
return VU_INSTRUCTION_TABLE[83];
case 15:
return VU_INSTRUCTION_TABLE[84];
case 16:
return VU_INSTRUCTION_TABLE[85];
case 17:
return VU_INSTRUCTION_TABLE[86];
case 18:
return VU_INSTRUCTION_TABLE[87];
case 19:
return VU_INSTRUCTION_TABLE[88];
case 20:
return VU_INSTRUCTION_TABLE[89];
case 21:
return VU_INSTRUCTION_TABLE[90];
case 22:
return VU_INSTRUCTION_TABLE[91];
case 23:
return VU_INSTRUCTION_TABLE[92];
case 24:
return VU_INSTRUCTION_TABLE[93];
case 25:
return VU_INSTRUCTION_TABLE[94];
case 26:
return VU_INSTRUCTION_TABLE[95];
case 27:
return VU_INSTRUCTION_TABLE[96];
case 28:
return VU_INSTRUCTION_TABLE[97];
case 29:
return VU_INSTRUCTION_TABLE[98];
case 30:
return VU_INSTRUCTION_TABLE[99];
case 31:
return VU_INSTRUCTION_TABLE[100];
case 32:
return VU_INSTRUCTION_TABLE[101];
case 33:
return VU_INSTRUCTION_TABLE[102];
case 34:
return VU_INSTRUCTION_TABLE[103];
case 35:
return VU_INSTRUCTION_TABLE[104];
case 36:
return VU_INSTRUCTION_TABLE[105];
case 37:
return VU_INSTRUCTION_TABLE[106];
case 38:
return VU_INSTRUCTION_TABLE[107];
case 39:
return VU_INSTRUCTION_TABLE[108];
case 40:
return VU_INSTRUCTION_TABLE[109];
case 41:
return VU_INSTRUCTION_TABLE[110];
case 42:
return VU_INSTRUCTION_TABLE[111];
case 43:
return VU_INSTRUCTION_TABLE[112];
case 44:
return VU_INSTRUCTION_TABLE[113];
case 45:
return VU_INSTRUCTION_TABLE[114];
case 46:
return VU_INSTRUCTION_TABLE[115];
case 47:
return VU_INSTRUCTION_TABLE[116];
case 60:
{
switch (fd())
{
case 0:
return VU_INSTRUCTION_TABLE[117];
case 1:
return VU_INSTRUCTION_TABLE[118];
case 2:
return VU_INSTRUCTION_TABLE[119];
case 3:
return VU_INSTRUCTION_TABLE[120];
case 4:
return VU_INSTRUCTION_TABLE[121];
case 5:
return VU_INSTRUCTION_TABLE[122];
case 6:
return VU_INSTRUCTION_TABLE[123];
case 7:
return VU_INSTRUCTION_TABLE[124];
case 8:
return VU_INSTRUCTION_TABLE[125];
case 9:
return VU_INSTRUCTION_TABLE[126];
case 10:
return VU_INSTRUCTION_TABLE[127];
case 11:
return VU_INSTRUCTION_TABLE[128];
default:
throw std::runtime_error("VU: Could not determine the upper instruction");
}
}
case 61:
{
switch (fd())
{
case 0:
return VU_INSTRUCTION_TABLE[129];
case 1:
return VU_INSTRUCTION_TABLE[130];
case 2:
return VU_INSTRUCTION_TABLE[131];
case 3:
return VU_INSTRUCTION_TABLE[132];
case 4:
return VU_INSTRUCTION_TABLE[133];
case 5:
return VU_INSTRUCTION_TABLE[134];
case 6:
return VU_INSTRUCTION_TABLE[135];
case 7:
return VU_INSTRUCTION_TABLE[136];
case 8:
return VU_INSTRUCTION_TABLE[137];
case 9:
return VU_INSTRUCTION_TABLE[138];
case 10:
return VU_INSTRUCTION_TABLE[139];
case 11:
return VU_INSTRUCTION_TABLE[140];
default:
throw std::runtime_error("VU: Could not determine the upper instruction");
}
}
case 62:
{
switch (fd())
{
case 0:
return VU_INSTRUCTION_TABLE[141];
case 1:
return VU_INSTRUCTION_TABLE[142];
case 2:
return VU_INSTRUCTION_TABLE[143];
case 3:
return VU_INSTRUCTION_TABLE[144];
case 4:
return VU_INSTRUCTION_TABLE[145];
case 5:
return VU_INSTRUCTION_TABLE[146];
case 6:
return VU_INSTRUCTION_TABLE[147];
case 7:
return VU_INSTRUCTION_TABLE[148];
case 8:
return VU_INSTRUCTION_TABLE[149];
case 9:
return VU_INSTRUCTION_TABLE[150];
case 10:
return VU_INSTRUCTION_TABLE[151];
case 11:
return VU_INSTRUCTION_TABLE[152];
default:
throw std::runtime_error("VU: Could not determine the upper instruction");
}
}
case 63:
{
switch (fd())
{
case 0:
return VU_INSTRUCTION_TABLE[153];
case 1:
return VU_INSTRUCTION_TABLE[154];
case 2:
return VU_INSTRUCTION_TABLE[155];
case 3:
return VU_INSTRUCTION_TABLE[156];
case 4:
return VU_INSTRUCTION_TABLE[157];
case 5:
return VU_INSTRUCTION_TABLE[158];
case 6:
return VU_INSTRUCTION_TABLE[159];
case 7:
return VU_INSTRUCTION_TABLE[160];
case 8:
return VU_INSTRUCTION_TABLE[161];
case 9:
return VU_INSTRUCTION_TABLE[162];
case 11:
return VU_INSTRUCTION_TABLE[163];
default:
throw std::runtime_error("VU: Could not determine the upper instruction");
}
}
default:
throw std::runtime_error("VU: Could not determine the upper instruction");
}
}

View file

@ -1,5 +1,6 @@
#pragma once
#include "Common/Constants.hpp"
#include "Common/Types/Mips/MipsInstruction.hpp"
#include "Common/Types/Mips/MipsInstructionInfo.hpp"
#include "Resources/Ee/Vpu/Vu/VuVectorField.hpp"
@ -165,4 +166,7 @@ struct VuInstruction : public MipsInstruction
{
return W.extract_from(value) > 0;
}
MipsInstructionInfo lower_lookup() const;
MipsInstructionInfo upper_lookup() const;
};

View file

@ -165,7 +165,7 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 43:
return &IOP_CORE_INSTRUCTION_TABLE[27];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}
case 1:
@ -181,7 +181,7 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 16:
return &IOP_CORE_INSTRUCTION_TABLE[31];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}
case 16:
@ -199,7 +199,7 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 16:
return &IOP_CORE_INSTRUCTION_TABLE[36];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}
case 18:
@ -219,7 +219,7 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 6:
return &IOP_CORE_INSTRUCTION_TABLE[40];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}
case 1:
@ -265,7 +265,7 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 62:
return &IOP_CORE_INSTRUCTION_TABLE[61];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}
case 2:
@ -325,6 +325,6 @@ MipsInstructionInfo* IopCoreInstruction::lookup() const
case 58:
return &IOP_CORE_INSTRUCTION_TABLE[89];
default:
throw std::runtime_error("Could not determine instruction");
throw std::runtime_error("IOP Core: Could not determine instruction");
}
}