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cpu: added hardware breakpoints on execution
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.gitattributes
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.gitattributes
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@ -0,0 +1 @@
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* text=auto
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@ -32,6 +32,8 @@ struct COP0 {
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uint32_t superMasterEnable2 : 1; // bits 24..29
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};
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inline bool codeBreakpointEnabled() { return masterEnableBreakpoints && superMasterEnable1 && superMasterEnable2 && breakOnCode; }
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uint32_t _reg;
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DCIC() : _reg(0) {}
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};
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@ -54,7 +54,17 @@ void CPU::saveStateForException() {
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branchTaken = false;
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}
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bool CPU::handleBreakpoints() {
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void CPU::handleHardwareBreakpoints() {
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if (cop0.dcic.codeBreakpointEnabled()) {
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if (((PC ^ cop0.bpcm) & cop0.bpc) == 0) {
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cop0.dcic.codeBreakpointHit = 1;
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cop0.dcic.breakpointHit = 1;
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instructions::exception(this, COP0::CAUSE::Exception::breakpoint);
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}
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}
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}
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bool CPU::handleSoftwareBreakpoints() {
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if (!breakpoints.empty()) {
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auto bp = breakpoints.find(PC);
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if (bp != breakpoints.end() && bp->second.enabled) {
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@ -83,10 +93,10 @@ bool CPU::executeInstructions(int count) {
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if (maskedPc == 0xa0 || maskedPc == 0xb0 || maskedPc == 0xc0) sys->handleBiosFunction();
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saveStateForException();
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checkForInterrupts();
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handleHardwareBreakpoints();
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if (handleBreakpoints()) return false;
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if (handleSoftwareBreakpoints()) return false;
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_opcode = Opcode(sys->readMemory32(PC));
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const auto& op = instructions::OpcodeTable[_opcode.op];
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@ -96,7 +96,8 @@ struct CPU {
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}
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void saveStateForException();
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bool handleBreakpoints();
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void handleHardwareBreakpoints();
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bool handleSoftwareBreakpoints();
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bool executeInstructions(int count);
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struct Breakpoint {
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@ -201,7 +201,12 @@ void exception(CPU *cpu, COP0::CAUSE::Exception cause) {
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cpu->cop0.tar = cpu->PC;
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}
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cpu->setPC(cpu->cop0.status.getHandlerAddress());
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uint32_t handlerAddress = cpu->cop0.status.getHandlerAddress();
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if (cause == Exception::breakpoint) {
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handlerAddress -= 0x40;
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}
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cpu->setPC(handlerAddress);
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}
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void dummy(CPU *cpu, Opcode i) {
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