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Author SHA1 Message Date
Marco Satti fd94f215e0 Initial work on variable sized ByteBus page table done. 
Still have to clean it up, but it works. This will let the EE
have access to IOP registers without blowing out the memory
usage.
 2018-02-18 10:07:38 +08:00
Marco Satti 76a82536c9 Added additional checks in the ByteBus to help in debugging. 2018-02-07 21:07:53 +08:00
Marco Satti 0c730fe900 Merge branch 'master' of https://github.com/marco9999/orbum 2018-02-04 14:59:49 +08:00
Marco Satti 52a2d01c94 Add instruction parser utility. 2018-02-04 14:59:24 +08:00
Marco Satti 4cf733d169 Fixed the SW instruction (how did this no cause problems before...). 2018-02-04 14:28:00 +08:00
Marco Satti 4e310e2a77 Updated MMI instructions. 2018-02-03 22:50:29 +08:00
Marco Satti b2a6b71049 Update of more MMI instructions. 2018-02-01 18:51:02 +08:00
Marco Satti 2079bb7072 Fixed up some MMI instructions, more to go. 2018-01-28 15:35:30 +08:00
Marco Satti 71dce37a2e Small speedup with caching EE count interrupt state. 2018-01-27 18:35:44 +08:00
Marco Satti 5e7f947a0a Reworked EE TLB a bit - old version was incorrect, and now caches important masks for small speedup. 2018-01-27 17:31:56 +08:00
Marco Satti bb534474e0 Cached the interrupts masked status and operating context for small speedups. 2018-01-27 08:52:18 +08:00
Marco Satti 194f8d0428 Fixed bugs last commit created... Fuck I am a muppet at times, the queue types were always broken. 2018-01-27 00:51:11 +08:00
Marco Satti 17e8d206e5 Hopefully fixed a race condition causing multiple controllers to run at once (same event). 2018-01-26 17:16:54 +08:00
Marco Satti 90b8b40d4d Update readme. 2018-01-23 20:30:13 +08:00
Marco Satti 5204c8e7a2 Merge branch 'appveyor' - still failing due to boost/msvc interaction. 
Need to wait for an updated boost-cmake.
 2018-01-23 20:03:31 +08:00
Marco Satti fe249e47f1 Forgot version. 2018-01-23 19:51:45 +08:00
Marco Satti 9bb4cfd9d8 Try x64 only. 2018-01-23 19:50:39 +08:00
Marco Satti cd0aa522b8 Get the right build file path... 2018-01-23 19:24:25 +08:00
Marco Satti 5690415f03 Set it to clone submodules (boost). 2018-01-23 19:15:59 +08:00
Marco Satti 08af8b98b1 Try getting appveyor CI working... 2018-01-23 19:09:59 +08:00
Marco Satti d44c0b9c18 Fix up compile errors, added lock to EE DMAC while suspending channel (fixes a hang). 2018-01-22 22:37:31 +08:00
Marco Satti 61c77807fa Made the interrupts a little easier to track. 
Made the IOP INTC interrupts edge-triggered.
 2018-01-21 22:33:52 +08:00
Marco Satti 6c0aaf31ac Added in code for resetting the SIO0/2. 2018-01-20 19:24:11 +08:00
Marco Satti 93b7a158f4 Remove old ref to boost git project. 2018-01-11 20:35:49 +08:00
Marco Satti d5698adf27 Remove constexpr definitions (not needed under C++17). 2018-01-11 20:15:15 +08:00
Marco Satti 4df314dbfe Merge branch 'Thunder07-build' 2018-01-10 21:46:02 +08:00
Marco Satti 773d2676ed Merge branch 'build' of https://github.com/Thunder07/PCSX2_rewrite into Thunder07-build 2018-01-10 21:45:20 +08:00
Marco Satti ba9f25c575 Add back in boost-cmake. 2018-01-10 21:33:05 +08:00
Mahmood(Thunder07) 63198b9f94 Partial build Fix 2018-01-09 14:53:25 +00:00
Marco Satti cb485ab942 Fix up errors for unix compiles. 2018-01-09 22:31:21 +08:00
Marco Satti 208c48d5a1 Fix up errors for unix compiles. 
Signed-off-by: Mahmood(Thunder07) <m.a.hot.m+git@gmail.com>
 2018-01-09 14:30:35 +00:00
Marco Satti 356b70af3b Fix cmake install rules. 2018-01-07 22:20:50 +08:00
Marco Satti 1973274b4d Add travis CI basic config... 2018-01-07 18:27:32 +08:00
Marco Satti 280fb1669a Put in SIO2 data fifo. 2018-01-07 15:12:25 +08:00
Marco Satti 33b3ebb6bd A few tweaks to make it not error out straight away... 2018-01-03 22:57:56 +08:00
Marco Satti 8d8d5d7c6a Updated readme. 2018-01-01 21:43:02 +08:00
Marco Satti d29f91a58f Major refactor, moved to a scalable multithreaded design (executor). 2018-01-01 21:41:39 +08:00
Marco Satti 261698ae8e Refactor all of the resources into a memory friendly (spatial) structure. WIP still. 
Removed individual register logging, use controller memory access ranges to do this.

Controllers will need to be updated, the instruction tables will be auto generated shortly.
 2017-11-18 14:41:23 +08:00
Marco Satti 1f2b8449b3 Working on SIO0 and SIO2 (controller and MC's), might take a while as PCSX2's code is hard to read... Lots of unusual things going on, although the SIO0 might be ok thanks to nocash docs. 2017-07-16 21:26:43 +08:00
Marco Satti f634a14c5f Fixed up minor error with SPU2 interrupts. 2017-07-06 22:09:59 +08:00
Marco Satti ab51de1680 Added in IOP Timers hblank mode for TMR1, added CDVD S-CMD 0x15. IOP now in interruptable idle (good). 2017-07-01 17:21:43 +08:00
Marco Satti 8293ea01a1 SPU2 now passes initial DMA (ADMA and MDMA writes)! 2017-07-01 00:59:52 +08:00
Marco Satti 667aea2f93 Synchronous DMAC's now working properly, should be better for the SPU2 situation. Any peripherals that send data will probably need to wait for the DMAC to receive it as well, not up to that yet. 2017-06-28 21:44:00 +08:00
Marco Satti 9ac4ebcc9f Trying out synchronous DMA (waiting for the perhipheral to fully receive data before interrupting). 2017-06-28 16:49:27 +08:00
Marco Satti 2add548fd7 Added wrapper registers for the PCR and ICR's of the IOP DMAC, still toying around with the SPU2 (which requires direct access to IOP DMAC registers). 2017-06-25 00:10:26 +08:00
Marco Satti e937f2ec11 Definitely getting somewhere with the SPU2.STATX - starting to see the IOP waiting for the spu to finish reciving data in a timing loop. 2017-06-22 22:22:25 +08:00
Marco Satti 6999a7772a Nope, IOP was getting stuck on the SPU2. Trying to cheat my way around doesn't work either, so I'll be spending time looking into properly implementing the SPU2. 2017-06-18 21:01:18 +08:00
Marco Satti 4eb2b5c042 Fixed up SPU2 ADMA write and added in MDMA write. Emulation appears to be looping without crashing - haven't had a proper look, but I hope its because the EE is waiting on the VPU's or GS! 2017-06-18 13:27:42 +08:00
Marco Satti a4712d931c Add in unknown regions to the SPU2 resources. Currently trying to do a MDMA write but it's not implemented. 2017-06-18 09:52:33 +08:00
Marco Satti def785405d Added in more SIO2 registers. 2017-06-17 14:45:51 +08:00