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Author SHA1 Message Date
hch12907 4e62239a94 Fix clang-7 and MSVC build 
- added missing includes
- fixed ambiguous Bitfield extract_from
- VU branch delay slot cleanup
- removed unused CGif function
- removed reference to removed variables
 2018-10-21 00:12:14 +08:00
hch12907 313f59a019 Try branch in branch delay slot support... 2018-10-18 19:50:24 +08:00
hch12907 dabf082d2f GIF: Add missing register GIF_CNT 2018-10-13 21:56:26 +08:00
hch12907 62bb9925ab Merge marco9999/gif-impl. 2018-10-12 18:44:34 +08:00
Hoe Hao Cheng cc9fd11233 Run clang-format and update README 2018-10-10 22:39:55 +08:00
hch12907 3492c0b152 Implement M-bit handling 
- only VU side, EE/COP2 side not implemented yet (another PR for that)
- this is a rough implementation, it doesnt even differentiate CPR and CCR
- also, a quick bugfix for WAITQ data hazard
 2018-10-10 22:35:14 +08:00
hch12907 ee45eefca9 fix MSVC build 2018-10-10 22:35:14 +08:00
hch12907 52e6bf9d99 Implement data hazard, register writing priority, proper CPI for VU interpreter 
- implemented data hazard
- implemented register writing priority
- proper CPI
- note: WAITP and WAITQ is handled as a data hazard (special case)
 2018-10-10 22:36:42 +08:00
hch12907 56b5e45d84 Implement VU pipelines 
note: this commit can be reverted if pipeline emulation is found to be unneccessary
- added MipsPipeline
- implemented VU pipelines for the interpreter
 2018-10-10 22:35:14 +08:00
hch12907 1d1212e57e Implement VU interpreter 2018-09-24 00:43:06 +08:00
Marco Satti 5286c1ad7a
Merge pull request #17 from hch12907/master 
VU bugfixes
 2018-09-23 22:42:33 +08:00
Marco Satti f83bf61314
Merge pull request #15 from hch12907/vu-interpreter 
VU instruction table
 2018-09-23 22:29:52 +08:00
hch12907 6483bdb285 Add CPI to the VU instructions 2018-09-20 23:24:37 +08:00
hch12907 e4339b22cc Fix VU integer load/store 
note that in ILW/ILWR, the operation is undefined if multiple fields are specified
 2018-09-18 23:11:08 +08:00
Marco Satti e10163634d Implement reglist and image mode of GIF. 2018-09-16 14:16:14 +08:00
Marco Satti 48c4efcce6 Implement gif packed mode 2018-09-09 19:15:22 +08:00
hch12907 16b3570c4b Fix missing MAC flag clears 2018-09-08 17:09:42 +08:00
Marco Satti 30ad98be49 Merge branch 'master' into gif-impl 2018-09-08 14:51:34 +08:00
hch12907 2e9293c49e Add VU instruction lookup table 
- also improved log message for IOP/EE Core instruction lookup
 2018-09-02 22:20:44 +08:00
Marco Satti c9c5e21b16
Merge pull request #14 from hch12907/master 
A great hunt for those pesky unimplemented VU instructions
 2018-09-02 21:46:27 +08:00
hch12907 f4abbb78f9 Add branch delay slots to VUs and squash some bugs 
- added branch delay slots to the VUs (todo: different ANDs for VU0 and VU1, VU0 has smaller micromem)
- fixed imm15 (forgot to lshift DEST by 11 bits)
- removed various warnings (heck, even fixed one bug!)
- extended the visibility of the members in BranchDelaySlot to protected
- [experimental] branching in branch delay slots
 2018-09-01 18:49:51 +08:00
hch12907 cabefebec9 Implement VU transfer instructions 
finally finished implementing those instructions!
also added some basic comments
 2018-08-26 01:55:24 +08:00
hch12907 9ead3c7cba Implement VU_OTHER instructions 2018-08-26 01:55:23 +08:00
hch12907 fe1cf18572 Implement VU EFU instructions 2018-08-26 01:55:23 +08:00
hch12907 9f0688f7df Implement VU integer instructions 
- Added a small utility for N-bit integer parsing
 2018-08-26 01:55:02 +08:00
Marco Satti 0bfb350a34 Add in GIF registers 2018-08-19 21:56:07 +08:00
Marco Satti 3e87790f06 Added Giftag structure. 2018-08-19 16:50:22 +08:00
hch12907 f52006c7c8 Add imm5 to VuInstruction 2018-08-18 20:16:27 +08:00
hch12907 3bfc8f1282 Merge branch 'vu-flag' 2018-08-18 15:38:31 +08:00
Marco Satti 63d20c5249 Remove clear_flags() from VU status register - not needed. 2018-08-18 15:10:27 +08:00
Marco Satti 6bc7c0daa9 Merge branch 'serialization' 2018-08-18 14:47:53 +08:00
Marco Satti 1605c43d86 Merge branch 'master' into serialization 2018-08-18 14:46:40 +08:00
Marco Satti 6250df03fa
Merge pull request #12 from hch12907/master 
Implement VU float-related instructions & bugfixes
 2018-08-18 14:38:41 +08:00
hch12907 6df4b8c56e Improved documentation and code 
- use f32 instead of float
 2018-08-17 19:04:28 +08:00
hch12907 21e59162b0 Implement VU flag instructions 2018-08-16 21:21:54 +08:00
hch12907 be92f7143a Add more VuInstruction field extraction functions 
id(), is(), it(), imm12(), imm15()
 2018-08-16 21:21:04 +08:00
hch12907 8bdcf2763a ITOF0 bugfix 
how the hell did this compile in the first place?
 2018-08-16 00:09:58 +08:00
hch12907 d3100c03b5 Clear the field if the FMAC unit is unused 2018-08-15 23:19:52 +08:00
hch12907 ff836d0fc5 Fix status flags of MADD* instructions and MSUB* instructions 2018-08-15 22:35:01 +08:00
hch12907 289f10893d Fixed code and formatting 
- forgot to update the sticky flags
- clang-format somehow messed up the formatting of OPM* instructions
- RSQRT used wrong dividend
- removed redundant clear_flags()
 2018-08-11 23:13:40 +08:00
hch12907 ad9d719733 Improved comment 2018-08-09 00:22:26 +08:00
hch12907 f506b7ae3e Float point fix 2018-08-09 00:17:18 +08:00
Marco Satti 150a872f2c Add in missing cereal includes. 2018-08-08 23:14:09 +08:00
Marco Satti 99f502c4cc Fix up all errors... 2018-08-08 22:51:39 +08:00
hch12907 94981cb388 Implement even more VU float-related instructions 
OPMULA, OPMSUB, DIV, SQRT, RSQRT

clang-formatted the code
 2018-08-08 22:26:50 +08:00
Marco Satti f9c6862156 Does this fix submodules? 2018-08-08 21:42:47 +08:00
hch12907 353330f3e6 Implement more VU float-related instructions 
MADD*, MSUB*, MAX*, MINI* instructions
 2018-08-08 21:34:11 +08:00
Marco Satti 00bd4563a3 Remove crap from gitignore. 2018-08-08 21:29:47 +08:00
hch12907 4392d891f7 Implement VU float-related instructions 
the ADD*, SUB*, MUL* instructions for now
 2018-08-08 20:11:52 +08:00
Marco Satti c59074f102 Add in remainder of missing objects to serialize. 2018-08-07 21:47:20 +08:00